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authorLinus Torvalds <torvalds@linux-foundation.org>2011-03-17 19:08:06 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-03-17 19:08:06 -0700
commit411f5c7a502769ccc0377c5ba36cb0b283847ba8 (patch)
tree2c3a29671e3f923de48c55f94194849264a7bf53 /arch/arm/mach-mv78xx0/irq.c
parent6d7ed21d17e640b120b902a314143e5ef4917a70 (diff)
parent9ced9f03d12d7539e86b0bff5bc750153c976c34 (diff)
Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (289 commits) davinci: DM644x EVM: register MUSB device earlier davinci: add spi devices on tnetv107x evm davinci: add ssp config for tnetv107x evm board davinci: add tnetv107x ssp platform device spi: add ti-ssp spi master driver mfd: add driver for sequencer serial port ARM: EXYNOS4: Implement Clock gating for System MMU ARM: EXYNOS4: Enhancement of System MMU driver ARM: EXYNOS4: Add support for gpio interrupts ARM: S5P: Add function to register gpio interrupt bank data ARM: S5P: Cleanup S5P gpio interrupt code ARM: EXYNOS4: Add missing GPYx banks ARM: S3C64XX: Fix section mismatch from cpufreq init ARM: EXYNOS4: Add keypad device to the SMDKV310 ARM: EXYNOS4: Update clocks for keypad ARM: EXYNOS4: Update keypad base address ARM: EXYNOS4: Add keypad device helpers ARM: EXYNOS4: Add support for SATA on ARMLEX4210 plat-nomadik: make GPIO interrupts work with cpuidle ApSleep mach-u300: define a dummy filter function for coh901318 ... Fix up various conflicts in - arch/arm/mach-exynos4/cpufreq.c - arch/arm/mach-mxs/gpio.c - drivers/net/Kconfig - drivers/tty/serial/Kconfig - drivers/tty/serial/Makefile - drivers/usb/gadget/fsl_mxc_udc.c - drivers/video/Kconfig
Diffstat (limited to 'arch/arm/mach-mv78xx0/irq.c')
-rw-r--r--arch/arm/mach-mv78xx0/irq.c22
1 files changed, 6 insertions, 16 deletions
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 22b4ff893b3..08da497c39c 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -26,28 +26,18 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
void __init mv78xx0_init_irq(void)
{
- int i;
-
- /* Initialize gpiolib. */
- orion_gpio_init();
-
orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF));
/*
- * Mask and clear GPIO IRQ interrupts.
+ * Initialize gpiolib for GPIOs 0-31. (The GPIO interrupt mask
+ * registers for core #1 are at an offset of 0x18 from those of
+ * core #0.)
*/
- writel(0, GPIO_LEVEL_MASK(0));
- writel(0, GPIO_EDGE_MASK(0));
- writel(0, GPIO_EDGE_CAUSE(0));
-
- for (i = IRQ_MV78XX0_GPIO_START; i < NR_IRQS; i++) {
- set_irq_chip(i, &orion_gpio_irq_chip);
- set_irq_handler(i, handle_level_irq);
- irq_desc[i].status |= IRQ_LEVEL;
- set_irq_flags(i, IRQF_VALID);
- }
+ orion_gpio_init(0, 32, GPIO_VIRT_BASE,
+ mv78xx0_core_index() ? 0x18 : 0,
+ IRQ_MV78XX0_GPIO_START);
set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);