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authorOlof Johansson <olof@lixom.net>2012-09-22 14:09:21 -0700
committerOlof Johansson <olof@lixom.net>2012-09-22 14:22:47 -0700
commit0d601f613b8557cf6489f06251ae5dc383b811d0 (patch)
tree05f3a4d054e0bddc308af479918ce67cd02e8eba /arch/arm/mach-mvebu
parentd7ffa2234c186ce040e79b43639628c1c482b115 (diff)
parent5b40baee4a39d96d4d6a48a2b2383982912c429b (diff)
Merge branch 'kirkwood/addr_decode' of git://git.infradead.org/users/jcooper/linux into late/kirkwood
* 'kirkwood/addr_decode' of git://git.infradead.org/users/jcooper/linux: arm: mvebu: add address decoding controller to the DT arm: mvebu: add basic address decoding support to Armada 370/XP arm: plat-orion: make bridge_virt_base non-const to support DT use case arm: plat-orion: introduce PLAT_ORION_LEGACY hidden config option arm: plat-orion: use void __iomem pointers for addr-map functions arm: plat-orion: use void __iomem pointers for time functions arm: plat-orion: use void __iomem pointers for MPP functions arm: plat-orion: use void __iomem pointers for UART registration functions arm: mach-mvebu: use IOMEM() for base address definitions arm: mach-orion5x: use IOMEM() for base address definitions arm: mach-mv78xx0: use IOMEM() for base address definitions arm: mach-kirkwood: use IOMEM() for base address definitions arm: mach-dove: use IOMEM() for base address definitions arm: mach-orion5x: use plus instead of or for address definitions arm: mach-mv78xx0: use plus instead of or for address definitions arm: mach-kirkwood: use plus instead of or for address definitions arm: mach-dove: use plus instead of or for address definitions This branch had quite a few conflicts, in particular with the PCI static map rework from Rob Herring, and a few other context conflicts due to changes in Kconfig, etc. I fixed up conflicts in: arch/arm/Kconfig arch/arm/mach-dove/common.c arch/arm/mach-dove/include/mach/dove.h arch/arm/mach-kirkwood/common.c arch/arm/mach-kirkwood/include/mach/kirkwood.h arch/arm/mach-mv78xx0/common.c arch/arm/mach-mv78xx0/include/mach/mv78xx0.h arch/arm/mach-orion5x/common.c arch/arm/mach-orion5x/include/mach/orion5x.h Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-mvebu')
-rw-r--r--arch/arm/mach-mvebu/Makefile2
-rw-r--r--arch/arm/mach-mvebu/addr-map.c134
-rw-r--r--arch/arm/mach-mvebu/armada-370-xp.c2
-rw-r--r--arch/arm/mach-mvebu/armada-370-xp.h2
4 files changed, 137 insertions, 3 deletions
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 6ea8998ab8f..cbe56644306 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -1,4 +1,4 @@
ccflags-$(ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
obj-y += system-controller.o
-obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o
+obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o addr-map.o
diff --git a/arch/arm/mach-mvebu/addr-map.c b/arch/arm/mach-mvebu/addr-map.c
new file mode 100644
index 00000000000..fe454a4430b
--- /dev/null
+++ b/arch/arm/mach-mvebu/addr-map.c
@@ -0,0 +1,134 @@
+/*
+ * Address map functions for Marvell 370 / XP SoCs
+ *
+ * Copyright (C) 2012 Marvell
+ *
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mbus.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <plat/addr-map.h>
+
+/*
+ * Generic Address Decode Windows bit settings
+ */
+#define ARMADA_XP_TARGET_DEV_BUS 1
+#define ARMADA_XP_ATTR_DEV_BOOTROM 0x1D
+#define ARMADA_XP_TARGET_ETH1 3
+#define ARMADA_XP_TARGET_PCIE_0_2 4
+#define ARMADA_XP_TARGET_ETH0 7
+#define ARMADA_XP_TARGET_PCIE_1_3 8
+
+#define ARMADA_370_TARGET_DEV_BUS 1
+#define ARMADA_370_ATTR_DEV_BOOTROM 0x1D
+#define ARMADA_370_TARGET_PCIE_0 4
+#define ARMADA_370_TARGET_PCIE_1 8
+
+#define ARMADA_WINDOW_8_PLUS_OFFSET 0x90
+#define ARMADA_SDRAM_ADDR_DECODING_OFFSET 0x180
+
+static const struct __initdata orion_addr_map_info
+armada_xp_addr_map_info[] = {
+ /*
+ * Window for the BootROM, needed for SMP on Armada XP
+ */
+ { 0, 0xfff00000, SZ_1M, ARMADA_XP_TARGET_DEV_BUS,
+ ARMADA_XP_ATTR_DEV_BOOTROM, -1 },
+ /* End marker */
+ { -1, 0, 0, 0, 0, 0 },
+};
+
+static const struct __initdata orion_addr_map_info
+armada_370_addr_map_info[] = {
+ /* End marker */
+ { -1, 0, 0, 0, 0, 0 },
+};
+
+static struct of_device_id of_addr_decoding_controller_table[] = {
+ { .compatible = "marvell,armada-addr-decoding-controller" },
+ { /* end of list */ },
+};
+
+static void __iomem *
+armada_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
+{
+ unsigned int offset;
+
+ /* The register layout is a bit annoying and the below code
+ * tries to cope with it.
+ * - At offset 0x0, there are the registers for the first 8
+ * windows, with 4 registers of 32 bits per window (ctrl,
+ * base, remap low, remap high)
+ * - Then at offset 0x80, there is a hole of 0x10 bytes for
+ * the internal registers base address and internal units
+ * sync barrier register.
+ * - Then at offset 0x90, there the registers for 12
+ * windows, with only 2 registers of 32 bits per window
+ * (ctrl, base).
+ */
+ if (win < 8)
+ offset = (win << 4);
+ else
+ offset = ARMADA_WINDOW_8_PLUS_OFFSET + (win << 3);
+
+ return cfg->bridge_virt_base + offset;
+}
+
+static struct __initdata orion_addr_map_cfg addr_map_cfg = {
+ .num_wins = 20,
+ .remappable_wins = 8,
+ .win_cfg_base = armada_cfg_base,
+};
+
+static int __init armada_setup_cpu_mbus(void)
+{
+ struct device_node *np;
+ void __iomem *mbus_unit_addr_decoding_base;
+ void __iomem *sdram_addr_decoding_base;
+
+ np = of_find_matching_node(NULL, of_addr_decoding_controller_table);
+ if (!np)
+ return -ENODEV;
+
+ mbus_unit_addr_decoding_base = of_iomap(np, 0);
+ BUG_ON(!mbus_unit_addr_decoding_base);
+
+ sdram_addr_decoding_base =
+ mbus_unit_addr_decoding_base +
+ ARMADA_SDRAM_ADDR_DECODING_OFFSET;
+
+ addr_map_cfg.bridge_virt_base = mbus_unit_addr_decoding_base;
+
+ /*
+ * Disable, clear and configure windows.
+ */
+ if (of_machine_is_compatible("marvell,armadaxp"))
+ orion_config_wins(&addr_map_cfg, armada_xp_addr_map_info);
+ else if (of_machine_is_compatible("marvell,armada370"))
+ orion_config_wins(&addr_map_cfg, armada_370_addr_map_info);
+ else {
+ pr_err("Unsupported SoC\n");
+ return -EINVAL;
+ }
+
+ /*
+ * Setup MBUS dram target info.
+ */
+ orion_setup_cpu_mbus_target(&addr_map_cfg,
+ sdram_addr_decoding_base);
+ return 0;
+}
+
+/* Using a early_initcall is needed so that this initialization gets
+ * done before the SMP initialization, which requires the BootROM to
+ * be remapped. */
+early_initcall(armada_setup_cpu_mbus);
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index b46418a8b35..49d791548ad 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -25,7 +25,7 @@
static struct map_desc armada_370_xp_io_desc[] __initdata = {
{
- .virtual = ARMADA_370_XP_REGS_VIRT_BASE,
+ .virtual = (unsigned long) ARMADA_370_XP_REGS_VIRT_BASE,
.pfn = __phys_to_pfn(ARMADA_370_XP_REGS_PHYS_BASE),
.length = ARMADA_370_XP_REGS_SIZE,
.type = MT_DEVICE,
diff --git a/arch/arm/mach-mvebu/armada-370-xp.h b/arch/arm/mach-mvebu/armada-370-xp.h
index 25f0ca8d782..aac9bebc6b0 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.h
+++ b/arch/arm/mach-mvebu/armada-370-xp.h
@@ -16,7 +16,7 @@
#define __MACH_ARMADA_370_XP_H
#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000
-#define ARMADA_370_XP_REGS_VIRT_BASE 0xfeb00000
+#define ARMADA_370_XP_REGS_VIRT_BASE IOMEM(0xfeb00000)
#define ARMADA_370_XP_REGS_SIZE SZ_1M
#endif /* __MACH_ARMADA_370_XP_H */