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authorDinh Nguyen <Dinh.Nguyen@freescale.com>2010-11-15 11:29:59 -0600
committerSascha Hauer <s.hauer@pengutronix.de>2010-11-24 10:09:04 +0100
commitc0abefd30b2c9db015df4914a95d268ecdb39b00 (patch)
tree810c6f6e8e00604a78379424a6aae2140d7fadd5 /arch/arm/mach-mx5/devices.c
parent374daa4f9019f75da1addb3f31a22df1966a5baa (diff)
ARM: imx: Add core definitions for MX53
Add iomux, clocks, and memory map for Freescale's MX53 SoC. Add cpu_is_mx53 function to common.h. Add 3 more banks of gpio's to mxc_gpio_ports. Add MX53 phys offset address. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5/devices.c')
-rw-r--r--arch/arm/mach-mx5/devices.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
index 4c7be87a7c9..d926203023e 100644
--- a/arch/arm/mach-mx5/devices.c
+++ b/arch/arm/mach-mx5/devices.c
@@ -160,9 +160,36 @@ static struct mxc_gpio_port mxc_gpio_ports[] = {
.irq_high = MX51_MXC_INT_GPIO4_HIGH,
.virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3
},
+ {
+ .chip.label = "gpio-4",
+ .base = MX53_IO_ADDRESS(MX53_GPIO5_BASE_ADDR),
+ .irq = MX53_INT_GPIO5_LOW,
+ .irq_high = MX53_INT_GPIO5_HIGH,
+ .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 4
+ },
+ {
+ .chip.label = "gpio-5",
+ .base = MX53_IO_ADDRESS(MX53_GPIO6_BASE_ADDR),
+ .irq = MX53_INT_GPIO6_LOW,
+ .irq_high = MX53_INT_GPIO6_HIGH,
+ .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 5
+ },
+ {
+ .chip.label = "gpio-6",
+ .base = MX53_IO_ADDRESS(MX53_GPIO7_BASE_ADDR),
+ .irq = MX53_INT_GPIO7_LOW,
+ .irq_high = MX53_INT_GPIO7_HIGH,
+ .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 6
+ },
};
int __init imx51_register_gpios(void)
{
+ return mxc_gpio_init(mxc_gpio_ports, 4);
+}
+
+int __init imx53_register_gpios(void)
+{
return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
}
+