diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2011-02-22 18:24:26 +0100 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2011-02-22 18:41:48 +0100 |
commit | 695884fb8acd9857e0e7120ccb2150e30f4b8fef (patch) | |
tree | 49aa424c1a021ce432e9fa5ea29d37a23e4e30cc /arch/arm/mach-omap2/irq.c | |
parent | 5df91509d324d44cfb11e55d9cb02fe18b53b045 (diff) | |
parent | 04bea68b2f0eeebb089ecc67b618795925268b4a (diff) |
Merge branch 'devicetree/for-x86' of git://git.secretlab.ca/git/linux-2.6 into x86/platform
Reason: x86 devicetree support for ce4100 depends on those device tree
changes scheduled for .39.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/mach-omap2/irq.c')
-rw-r--r-- | arch/arm/mach-omap2/irq.c | 27 |
1 files changed, 16 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 32eeabe9d2a..23049c487c4 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -100,13 +100,14 @@ static int omap_check_spurious(unsigned int irq) } /* XXX: FIQ and additional INTC support (only MPU at the moment) */ -static void omap_ack_irq(unsigned int irq) +static void omap_ack_irq(struct irq_data *d) { intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL); } -static void omap_mask_irq(unsigned int irq) +static void omap_mask_irq(struct irq_data *d) { + unsigned int irq = d->irq; int offset = irq & (~(IRQ_BITS_PER_REG - 1)); if (cpu_is_omap34xx()) { @@ -128,8 +129,9 @@ static void omap_mask_irq(unsigned int irq) intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset); } -static void omap_unmask_irq(unsigned int irq) +static void omap_unmask_irq(struct irq_data *d) { + unsigned int irq = d->irq; int offset = irq & (~(IRQ_BITS_PER_REG - 1)); irq &= (IRQ_BITS_PER_REG - 1); @@ -137,17 +139,17 @@ static void omap_unmask_irq(unsigned int irq) intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset); } -static void omap_mask_ack_irq(unsigned int irq) +static void omap_mask_ack_irq(struct irq_data *d) { - omap_mask_irq(irq); - omap_ack_irq(irq); + omap_mask_irq(d); + omap_ack_irq(d); } static struct irq_chip omap_irq_chip = { - .name = "INTC", - .ack = omap_mask_ack_irq, - .mask = omap_mask_irq, - .unmask = omap_unmask_irq, + .name = "INTC", + .irq_ack = omap_mask_ack_irq, + .irq_mask = omap_mask_irq, + .irq_unmask = omap_unmask_irq, }; static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) @@ -284,7 +286,10 @@ void omap3_intc_suspend(void) void omap3_intc_prepare_idle(void) { - /* Disable autoidle as it can stall interrupt controller */ + /* + * Disable autoidle as it can stall interrupt controller, + * cf. errata ID i540 for 3430 (all revisions up to 3.1.x) + */ intc_bank_write_reg(0, &irq_banks[0], INTC_SYSCONFIG); } |