diff options
author | Tony Lindgren <tony@atomide.com> | 2012-09-23 19:31:35 -0700 |
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committer | Tony Lindgren <tony@atomide.com> | 2012-09-23 19:31:35 -0700 |
commit | 9cd68fa707cf6372f33eb51a5719dd7626efe5f6 (patch) | |
tree | 66cde27bd288e011a6e4cff87d342666399a1266 /arch/arm/mach-omap2/omap_hwmod_2420_data.c | |
parent | 5698bd757d55b1bb87edd1a9744ab09c142abfc2 (diff) | |
parent | 76a5d9bfc42d60e9a672e0cae776157a60970f4e (diff) |
Merge tag 'omap-devel-b-c-2-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-late
OMAP patches intended for the 3.7 merge window:
- Runtime PM conversions for the GPMC and RNG IP blocks
- Preparation patches for the OMAP common clock framework conversion
- clkdev alias additions required by other drivers
- Performance Monitoring Unit (PMU) support for OMAP2, 3, and non-4430 OMAP4
- OMAP hwmod code and data improvements
- Preparation patches for the IOMMU runtime PM conversion
- Preparation patches for OMAP4 full-chip retention support
Based on a merge of v3.6-rc6, the omap-cleanup-b-for-3.7 tag
(7852ec0536ca39cefffc6301dc77f8ae55592926),the cleanup-fixes-for-v3.7
tag (de6ca33a96a6bf61fcb91d3d399703e19ead9d1e), and the
omap-devel-am33xx-for-v3.7 tag
(11964f53eb4d9ce59a058be9999d9cfcb1ced878), due to dependencies.
These patches have been tested for meaningful warnings from
checkpatch, sparse, smatch, and cppcheck. Basic build, boot[1], and
PM test logs are available here:
http://www.pwsan.com/omap/testlogs/hwmod_prcm_clock_a_3.7/20120923173830/
...
1. Note that the N800 boot fails due to a known issue present in the
base commit:
http://www.spinics.net/lists/arm-kernel/msg196034.html
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_2420_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 44 |
1 files changed, 30 insertions, 14 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 50cfab61b0e..e778ff4e188 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -13,12 +13,9 @@ * XXX these should be marked initdata for multi-OMAP kernels */ #include <plat/omap_hwmod.h> -#include <mach/irqs.h> -#include <plat/cpu.h> #include <plat/dma.h> #include <plat/serial.h> #include <plat/i2c.h> -#include <plat/gpio.h> #include <plat/mcspi.h> #include <plat/dmtimer.h> #include <plat/l3_2xxx.h> @@ -162,9 +159,9 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { /* mailbox */ static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { - { .name = "dsp", .irq = 26 }, - { .name = "iva", .irq = 34 }, - { .irq = -1 } + { .name = "dsp", .irq = 26 + OMAP_INTC_START, }, + { .name = "iva", .irq = 34 + OMAP_INTC_START, }, + { .irq = -1 }, }; static struct omap_hwmod omap2420_mailbox_hwmod = { @@ -199,9 +196,9 @@ static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = { /* mcbsp1 */ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { - { .name = "tx", .irq = 59 }, - { .name = "rx", .irq = 60 }, - { .irq = -1 } + { .name = "tx", .irq = 59 + OMAP_INTC_START, }, + { .name = "rx", .irq = 60 + OMAP_INTC_START, }, + { .irq = -1 }, }; static struct omap_hwmod omap2420_mcbsp1_hwmod = { @@ -225,9 +222,9 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { /* mcbsp2 */ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { - { .name = "tx", .irq = 62 }, - { .name = "rx", .irq = 63 }, - { .irq = -1 } + { .name = "tx", .irq = 62 + OMAP_INTC_START, }, + { .name = "rx", .irq = 63 + OMAP_INTC_START, }, + { .irq = -1 }, }; static struct omap_hwmod omap2420_mcbsp2_hwmod = { @@ -265,8 +262,8 @@ static struct omap_hwmod_class omap2420_msdi_hwmod_class = { /* msdi1 */ static struct omap_hwmod_irq_info omap2420_msdi1_irqs[] = { - { .irq = 83 }, - { .irq = -1 } + { .irq = 83 + OMAP_INTC_START, }, + { .irq = -1 }, }; static struct omap_hwmod_dma_info omap2420_msdi1_sdma_reqs[] = { @@ -538,6 +535,15 @@ static struct omap_hwmod_addr_space omap2420_counter_32k_addrs[] = { { } }; +static struct omap_hwmod_addr_space omap2420_gpmc_addrs[] = { + { + .pa_start = 0x6800a000, + .pa_end = 0x6800afff, + .flags = ADDR_TYPE_RT + }, + { } +}; + static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = { .master = &omap2xxx_l4_wkup_hwmod, .slave = &omap2xxx_counter_32k_hwmod, @@ -546,6 +552,14 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +static struct omap_hwmod_ocp_if omap2420_l3__gpmc = { + .master = &omap2xxx_l3_main_hwmod, + .slave = &omap2xxx_gpmc_hwmod, + .clk = "core_l3_ck", + .addr = omap2420_gpmc_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { &omap2xxx_l3_main__l4_core, &omap2xxx_mpu__l3_main, @@ -587,8 +601,10 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { &omap2420_l4_core__mcbsp1, &omap2420_l4_core__mcbsp2, &omap2420_l4_core__msdi1, + &omap2xxx_l4_core__rng, &omap2420_l4_core__hdq1w, &omap2420_l4_wkup__counter_32k, + &omap2420_l3__gpmc, NULL, }; |