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authorDavid S. Miller <davem@davemloft.net>2009-06-15 03:02:23 -0700
committerDavid S. Miller <davem@davemloft.net>2009-06-15 03:02:23 -0700
commit9cbc1cb8cd46ce1f7645b9de249b2ce8460129bb (patch)
tree8d104ec2a459346b99413b0b77421ca7b9936c1a /arch/arm/mach-omap2/timer-gp.c
parentca44d6e60f9de26281fda203f58b570e1748c015 (diff)
parent45e3e1935e2857c54783291107d33323b3ef33c8 (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: Documentation/feature-removal-schedule.txt drivers/scsi/fcoe/fcoe.c net/core/drop_monitor.c net/core/net-traces.c
Diffstat (limited to 'arch/arm/mach-omap2/timer-gp.c')
-rw-r--r--arch/arm/mach-omap2/timer-gp.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index f36aba12090..97eeeebcb06 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -17,9 +17,10 @@
*
* Some parts based off of TI's 24xx code:
*
- * Copyright (C) 2004 Texas Instruments, Inc.
+ * Copyright (C) 2004-2009 Texas Instruments, Inc.
*
* Roughly modelled after the OMAP1 MPU timer code.
+ * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -37,6 +38,7 @@
#include <asm/mach/time.h>
#include <mach/dmtimer.h>
+#include <asm/localtimer.h>
/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
#define MAX_GPTIMER_ID 12
@@ -82,7 +84,8 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_PERIODIC:
period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
period -= 1;
-
+ if (cpu_is_omap44xx())
+ period = 0xff; /* FIXME: */
omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
break;
case CLOCK_EVT_MODE_ONESHOT:
@@ -145,6 +148,9 @@ static void __init omap2_gp_clockevent_init(void)
"timer-gp: omap_dm_timer_set_source() failed\n");
tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
+ if (cpu_is_omap44xx())
+ /* Assuming 32kHz clk is driving GPT1 */
+ tick_rate = 32768; /* FIXME: */
pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
gptimer_id, tick_rate);
@@ -224,6 +230,9 @@ static void __init omap2_gp_clocksource_init(void)
static void __init omap2_gp_timer_init(void)
{
+#ifdef CONFIG_LOCAL_TIMERS
+ twd_base = IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE);
+#endif
omap_dm_timer_init();
omap2_gp_clockevent_init();