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authorIan Molton <spyro@f2s.com>2008-07-08 10:32:50 +0100
committerIan Molton <spyro@f2s.com>2008-07-10 10:28:49 +0100
commit13f7558237ed841b19f11e0920c01c4d6d50fcc5 (patch)
tree095c566671b214920479f2447bec1b9b99a2c894 /arch/arm/mach-pxa
parented847782f6459a5c94aa0c9f93679f6a4176a47a (diff)
Clocklib: Fix SA1111 clock name mess.
This patch uses the ability of PXA's clocklib to alias clock to resolve the problem caused by sharing the SA1111 IO controller between PXA and SA1100 architectures, which have differing GPIO numbering. Signed-off-by: Ian Molton <spyro@f2s.com>
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r--arch/arm/mach-pxa/clock.c30
-rw-r--r--arch/arm/mach-pxa/pxa25x.c31
2 files changed, 29 insertions, 32 deletions
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
index b4d04955dcb..630063ffa6f 100644
--- a/arch/arm/mach-pxa/clock.c
+++ b/arch/arm/mach-pxa/clock.c
@@ -101,21 +101,6 @@ unsigned long clk_get_rate(struct clk *clk)
EXPORT_SYMBOL(clk_get_rate);
-static void clk_gpio27_enable(struct clk *clk)
-{
- pxa_gpio_mode(GPIO11_3_6MHz_MD);
-}
-
-static void clk_gpio27_disable(struct clk *clk)
-{
-}
-
-static const struct clkops clk_gpio27_ops = {
- .enable = clk_gpio27_enable,
- .disable = clk_gpio27_disable,
-};
-
-
void clk_cken_enable(struct clk *clk)
{
CKEN |= 1 << clk->cken;
@@ -131,14 +116,6 @@ const struct clkops clk_cken_ops = {
.disable = clk_cken_disable,
};
-static struct clk common_clks[] = {
- {
- .name = "GPIO27_CLK",
- .ops = &clk_gpio27_ops,
- .rate = 3686400,
- },
-};
-
void clks_register(struct clk *clks, size_t num)
{
int i;
@@ -148,10 +125,3 @@ void clks_register(struct clk *clks, size_t num)
list_add(&clks[i].node, &clocks);
mutex_unlock(&clocks_mutex);
}
-
-static int __init clk_init(void)
-{
- clks_register(common_clks, ARRAY_SIZE(common_clks));
- return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 034d3a6c31d..c5b845b935b 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -132,6 +132,29 @@ static const struct clkops clk_pxa25x_gpio12_ops = {
.disable = clk_gpio12_disable,
};
+static unsigned long gpio11_config_3m6[] = {
+ GPIO11_3_6MHz,
+};
+
+static unsigned long gpio11_config_gpio[] = {
+ GPIO11_GPIO,
+};
+
+static void clk_gpio11_enable(struct clk *clk)
+{
+ pxa2xx_mfp_config(gpio11_config_3m6, 1);
+}
+
+static void clk_gpio11_disable(struct clk *clk)
+{
+ pxa2xx_mfp_config(gpio11_config_gpio, 1);
+}
+
+static const struct clkops clk_pxa25x_gpio11_ops = {
+ .enable = clk_gpio11_enable,
+ .disable = clk_gpio11_disable,
+};
+
/*
* 3.6864MHz -> OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz)
* 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
@@ -151,6 +174,7 @@ static struct clk pxa25x_clks[] = {
INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL),
INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa25x_device_udc.dev),
+ INIT_CLK("GPIO11_CLK", &clk_pxa25x_gpio11_ops, 3686400, 0, NULL),
INIT_CLK("GPIO12_CLK", &clk_pxa25x_gpio12_ops, 32768, 0, NULL),
INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev),
INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev),
@@ -169,7 +193,10 @@ static struct clk pxa25x_clks[] = {
INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
};
-static struct clk gpio7_clk = INIT_CKOTHER("GPIO7_CK", &pxa25x_clks[4], NULL);
+static struct clk pxa2xx_clk_aliases[] = {
+ INIT_CKOTHER("GPIO7_CLK", &pxa25x_clks[4], NULL),
+ INIT_CKOTHER("SA1111_CLK", &pxa25x_clks[5], NULL),
+};
#ifdef CONFIG_PM
@@ -344,7 +371,7 @@ static int __init pxa25x_init(void)
if (cpu_is_pxa255())
ret = platform_device_register(&pxa_device_hwuart);
- clks_register(&gpio7_clk, 1);
+ clks_register(pxa2xx_clk_aliases, ARRAY_SIZE(pxa2xx_clk_aliases));
return ret;
}