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authorBen Dooks <ben-linux@fluff.org>2007-02-11 18:31:01 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-11 17:36:09 +0000
commita21765a70ec06be175d3997320a83fa66fcc8955 (patch)
tree24bdbf437a9bd5b7c1af05898f5aa25dccf67fe9 /arch/arm/mach-s3c2440/dsc.c
parentd19494b187b20e363f9b434b9ceab4159ac88324 (diff)
[ARM] 4157/2: S3C24XX: move arch/arch/mach-s3c2410 into cpu components
The following patch and script moves the arch/arm/mach-s3c2410 directory into arch/arm/plat-s3c24xx for the generic core code and inti arch/arm/mach-s3c{cpu} for the cpu/machine support files Include directory include/asm-arm/plat-s3c24xx is added for the core include files. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2440/dsc.c')
-rw-r--r--arch/arm/mach-s3c2440/dsc.c54
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c
new file mode 100644
index 00000000000..2995ff5681b
--- /dev/null
+++ b/arch/arm/mach-s3c2440/dsc.c
@@ -0,0 +1,54 @@
+/* linux/arch/arm/mach-s3c2440/dsc.c
+ *
+ * Copyright (c) 2004-2005 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * Samsung S3C2440 Drive Strength Control support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/module.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+
+#include <asm/arch/regs-gpio.h>
+#include <asm/arch/regs-dsc.h>
+
+#include <asm/plat-s3c24xx/cpu.h>
+#include <asm/plat-s3c24xx/s3c2440.h>
+
+int s3c2440_set_dsc(unsigned int pin, unsigned int value)
+{
+ void __iomem *base;
+ unsigned long val;
+ unsigned long flags;
+ unsigned long mask;
+
+ base = (pin & S3C2440_SELECT_DSC1) ? S3C2440_DSC1 : S3C2440_DSC0;
+ mask = 3 << S3C2440_DSC_GETSHIFT(pin);
+
+ local_irq_save(flags);
+
+ val = __raw_readl(base);
+ val &= ~mask;
+ val |= value & mask;
+ __raw_writel(val, base);
+
+ local_irq_restore(flags);
+ return 0;
+}
+
+EXPORT_SYMBOL(s3c2440_set_dsc);