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authorHeiko Stuebner <heiko@sntech.de>2013-02-12 10:12:04 -0800
committerKukjin Kim <kgene.kim@samsung.com>2013-03-05 20:21:21 +0900
commit5424f2188a76d006932bc6da67ed2ba1c2a72a8e (patch)
tree7ff7293675b5c62fc8ede45fbb0a8f1e4c3d2a5f /arch/arm/mach-s3c24xx/clock-s3c2443.c
parent4245944c71f90c0b38659e4a4f0d7741c79ef2b0 (diff)
ARM: S3C24XX: include first 4 bits of the eint register in irq mapping
This patch moves the irq numbers starting with EINT4 4 points down to enable the inclusion of the first 4 bits of EINT register into the mapping removing the need for special offset handling. For most S3C24XX architectures this will simply create 4 additional unused interrupts, but enables the S3C2412 to make use of the new infrastructure to realize its special handling of the EINT0 to EINT3 interrupts. All affected parts of the Samsung code (arch + drivers) seem to use the real interrupt defines (IRQ_something) and not any form of S3C2410_IRQ(x) whose numbering is changed here starting from S3C2410_IRQ(32). This patch was runtime-tested on a s3c2416 based board. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/clock-s3c2443.c')
0 files changed, 0 insertions, 0 deletions