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authorRussell King <rmk+kernel@arm.linux.org.uk>2009-12-05 10:35:33 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-12-05 10:35:33 +0000
commit0719dc341389882cc834ed18fc9b7fc6006b2b85 (patch)
tree794480ac62c07ea8cc4e69c2cb3d2b83bb7f36b7 /arch/arm/mm/Kconfig
parente28edb723e64200554194da17617ee6e82de6690 (diff)
parent677f4f64e4b2336682f0e15c69b206ade6f6b131 (diff)
Merge branch 'devel-stable' into devel
Diffstat (limited to 'arch/arm/mm/Kconfig')
-rw-r--r--arch/arm/mm/Kconfig11
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 7b7d4c36c11..dd4698c67cc 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -388,7 +388,7 @@ config CPU_FEROCEON_OLD_ID
# ARMv6
config CPU_V6
- bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
+ bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX || ARCH_DOVE
select CPU_32v6
select CPU_ABRT_EV6
select CPU_PABRT_V6
@@ -764,6 +764,15 @@ config CACHE_L2X0
help
This option enables the L2x0 PrimeCell.
+config CACHE_TAUROS2
+ bool "Enable the Tauros2 L2 cache controller"
+ depends on ARCH_DOVE
+ default y
+ select OUTER_CACHE
+ help
+ This option enables the Tauros2 L2 cache controller (as
+ found on PJ1/PJ4).
+
config CACHE_XSC3L2
bool "Enable the L2 cache on XScale3"
depends on CPU_XSC3