diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-11-26 08:22:50 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-11-26 08:22:50 +0100 |
commit | 7fbb8759eff9a348efa5f352ffaa51c364837c4b (patch) | |
tree | d40cd3f47b9f667ba94d9613270132080dcb6a1a /arch/arm/mm/cache-xsc3l2.c | |
parent | 6003ab0bad4cc56f3c4fadf62a0d23a967b9c53b (diff) | |
parent | 13d428afc007fcfcd6deeb215618f54cf9c0cae6 (diff) |
Merge commit 'v2.6.28-rc6' into core/debug
Diffstat (limited to 'arch/arm/mm/cache-xsc3l2.c')
-rw-r--r-- | arch/arm/mm/cache-xsc3l2.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c index 158bd96763d..464de893a98 100644 --- a/arch/arm/mm/cache-xsc3l2.c +++ b/arch/arm/mm/cache-xsc3l2.c @@ -18,10 +18,11 @@ */ #include <linux/init.h> #include <linux/spinlock.h> +#include <linux/io.h> #include <asm/system.h> +#include <asm/cputype.h> #include <asm/cacheflush.h> -#include <asm/io.h> #define CR_L2 (1 << 26) @@ -97,7 +98,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end) /* * Clean and invalidate partial last cache line. */ - if (end & (CACHE_LINE_SIZE - 1)) { + if (start < end && (end & (CACHE_LINE_SIZE - 1))) { xsc3_l2_clean_pa(end & ~(CACHE_LINE_SIZE - 1)); xsc3_l2_inv_pa(end & ~(CACHE_LINE_SIZE - 1)); end &= ~(CACHE_LINE_SIZE - 1); @@ -106,7 +107,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end) /* * Invalidate all full cache lines between 'start' and 'end'. */ - while (start != end) { + while (start < end) { xsc3_l2_inv_pa(start); start += CACHE_LINE_SIZE; } |