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authorLen Brown <len.brown@intel.com>2009-09-19 00:11:26 -0400
committerLen Brown <len.brown@intel.com>2009-09-19 00:11:26 -0400
commitc602c65b2f81d14456771d1e3f15d1381f4b7efa (patch)
treef1f833c8dd6c1519eeb101be32f7fe54a9605af5 /arch/arm/plat-mxc/include/mach/mx3x.h
parent3834f47291df475be3f0f0fb7ccaa098967cc054 (diff)
parent78f28b7c555359c67c2a0d23f7436e915329421e (diff)
Merge branch 'linus' into sfi-release
Conflicts: arch/x86/kernel/setup.c drivers/acpi/power.c init/main.c Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx3x.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/mx3x.h21
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index b559a4bb576..009f4440276 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -11,10 +11,6 @@
#ifndef __ASM_ARCH_MXC_MX31_H__
#define __ASM_ARCH_MXC_MX31_H__
-#ifndef __ASM_ARCH_MXC_HARDWARE_H__
-#error "Do not include directly."
-#endif
-
/*
* MX31 memory map:
*
@@ -263,25 +259,8 @@
#define SYSTEM_REV_MIN CHIP_REV_1_0
#define SYSTEM_REV_NUM 3
-/* gpio and gpio based interrupt handling */
-#define GPIO_DR 0x00
-#define GPIO_GDIR 0x04
-#define GPIO_PSR 0x08
-#define GPIO_ICR1 0x0C
-#define GPIO_ICR2 0x10
-#define GPIO_IMR 0x14
-#define GPIO_ISR 0x18
-#define GPIO_INT_LOW_LEV 0x0
-#define GPIO_INT_HIGH_LEV 0x1
-#define GPIO_INT_RISE_EDGE 0x2
-#define GPIO_INT_FALL_EDGE 0x3
-#define GPIO_INT_NONE 0x4
-
/* Mandatory defines used globally */
-/* this CPU supports up to 96 GPIOs */
-#define ARCH_NR_GPIOS 96
-
#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
extern unsigned int system_rev;