diff options
author | Tony Lindgren <tony@atomide.com> | 2005-07-10 19:58:18 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-07-10 19:58:18 +0100 |
commit | bb13b5fdba16d5b30fe97f3d167bb138b978b71c (patch) | |
tree | 23e706d3412b29579909c499e1d9e62cc40a6f5e /arch/arm/plat-omap/mux.c | |
parent | d48af15ea7227d633ddd5002223c2b122b1032e1 (diff) |
[PATCH] ARM: 2804/1: OMAP update 9/11: Update OMAP arch files
Patch from Tony Lindgren
This patch by various OMAP developers syncs the OMAP
specific arch files with the linux-omap tree.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-omap/mux.c')
-rw-r--r-- | arch/arm/plat-omap/mux.c | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c index cbecd10d0b6..ea7b955b9c8 100644 --- a/arch/arm/plat-omap/mux.c +++ b/arch/arm/plat-omap/mux.c @@ -53,19 +53,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) return -EINVAL; } - cfg = ®_cfg_table[reg_cfg]; - - /* - * We do a pretty long section here with lock on, but pin muxing - * should only happen on driver init for each driver, so it's not time - * critical. - */ - spin_lock_irqsave(&mux_spin_lock, flags); + cfg = (reg_cfg_set *)®_cfg_table[reg_cfg]; /* Check the mux register in question */ if (cfg->mux_reg) { unsigned tmp1, tmp2; + spin_lock_irqsave(&mux_spin_lock, flags); reg_orig = omap_readl(cfg->mux_reg); /* The mux registers always seem to be 3 bits long */ @@ -80,11 +74,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) warn = 1; omap_writel(reg, cfg->mux_reg); + spin_unlock_irqrestore(&mux_spin_lock, flags); } /* Check for pull up or pull down selection on 1610 */ if (!cpu_is_omap1510()) { if (cfg->pu_pd_reg && cfg->pull_val) { + spin_lock_irqsave(&mux_spin_lock, flags); pu_pd_orig = omap_readl(cfg->pu_pd_reg); mask = 1 << cfg->pull_bit; @@ -100,11 +96,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) pu_pd = pu_pd_orig & ~mask; } omap_writel(pu_pd, cfg->pu_pd_reg); + spin_unlock_irqrestore(&mux_spin_lock, flags); } } /* Check for an associated pull down register */ if (cfg->pull_reg) { + spin_lock_irqsave(&mux_spin_lock, flags); pull_orig = omap_readl(cfg->pull_reg); mask = 1 << cfg->pull_bit; @@ -121,6 +119,7 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) } omap_writel(pull, cfg->pull_reg); + spin_unlock_irqrestore(&mux_spin_lock, flags); } if (warn) { @@ -149,8 +148,6 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) } #endif - spin_unlock_irqrestore(&mux_spin_lock, flags); - #ifdef CONFIG_OMAP_MUX_ERRORS return warn ? -ETXTBSY : 0; #else |