diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 14:06:38 +0100 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 21:46:08 +0000 |
| commit | e425382ed90d221ef9031a1b2d97d9bfedcf90c3 (patch) | |
| tree | ca36882dba4caf8a9726ed67216251360c80ef59 /arch/arm/plat-s3c24xx/clock.c | |
| parent | c3391e36d697c997b6afeb045071e0be95219a3e (diff) | |
[ARM] S3C24XX: Update clock data on resume
Update the clock settings on resume for suspend/resume
support so that if the boot loader changes anything or
the system's PLL is reset then we return with the correct
settings.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx/clock.c')
| -rw-r--r-- | arch/arm/plat-s3c24xx/clock.c | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c index 334e696200b..a4a0a67a307 100644 --- a/arch/arm/plat-s3c24xx/clock.c +++ b/arch/arm/plat-s3c24xx/clock.c @@ -47,6 +47,8 @@ #include <mach/regs-clock.h> #include <mach/regs-gpio.h> +#include <plat/cpu-freq.h> + #include <plat/clock.h> #include <plat/cpu.h> #include <plat/pll.h> @@ -327,24 +329,24 @@ int s3c24xx_register_clocks(struct clk **clks, int nr_clks) /* initalise all the clocks */ -int __init s3c24xx_setup_clocks(unsigned long xtal, - unsigned long fclk, - unsigned long hclk, - unsigned long pclk) +void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk, + unsigned long hclk, + unsigned long pclk) { - printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n"); - - /* initialise the main system clocks */ - - clk_xtal.rate = xtal; - clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON), xtal); + clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON), + clk_xtal.rate); clk_mpll.rate = fclk; clk_h.rate = hclk; clk_p.rate = pclk; clk_f.rate = fclk; +} - /* assume uart clocks are correctly setup */ +int __init s3c24xx_register_baseclocks(unsigned long xtal) +{ + printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n"); + + clk_xtal.rate = xtal; /* register our clocks */ @@ -368,3 +370,4 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, return 0; } + |