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authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-04 12:33:36 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-04 12:33:36 -0700
commite3d98847ded1d183111ff7c4d1ef56b161c7f13e (patch)
tree8ec2b298eef4f1695ca612014b7f75b85badae45 /arch/arm/plat-samsung
parent22b154365fbc096a46d936ec1f462ef8b9bd1f05 (diff)
parent721e0205b07589223343737a9c421d8118d87bba (diff)
Merge tag 'firmware-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM platform specific firmware interfaces from Olof Johansson: "Two platforms, bcm and exynos have their own firmware interfaces using the "secure monitor call", this adds support for those. We had originally planned to have a third set of patches in here, which would extend support for the existing generic "psci" call that is used on multiple platforms as well as Xen and KVM guests, but that ended up getting dropped because the patches were not ready in time." * tag 'firmware-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: bcm: mark bcm_kona_smc_init as __init ARM: bcm281xx: Add DT support for SMC handler ARM: bcm281xx: Add L2 cache enable code ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up ARM: EXYNOS: Add IO mapping for non-secure SYSRAM. ARM: EXYNOS: Add support for Exynos secure firmware ARM: EXYNOS: Add support for secure monitor calls ARM: Add interface for registering and calling firmware-specific operations
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r--arch/arm/plat-samsung/include/plat/map-s5p.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h
index c2d7bdae589..c18678610bc 100644
--- a/arch/arm/plat-samsung/include/plat/map-s5p.h
+++ b/arch/arm/plat-samsung/include/plat/map-s5p.h
@@ -22,6 +22,7 @@
#define S5P_VA_GPIO3 S3C_ADDR(0x02280000)
#define S5P_VA_SYSRAM S3C_ADDR(0x02400000)
+#define S5P_VA_SYSRAM_NS S3C_ADDR(0x02410000)
#define S5P_VA_DMC0 S3C_ADDR(0x02440000)
#define S5P_VA_DMC1 S3C_ADDR(0x02480000)
#define S5P_VA_SROMC S3C_ADDR(0x024C0000)