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| author | Lachlan McIlroy <lachlan@redback.melbourne.sgi.com> | 2009-01-08 13:22:55 +1100 |
|---|---|---|
| committer | Lachlan McIlroy <lachlan@redback.melbourne.sgi.com> | 2009-01-08 13:22:55 +1100 |
| commit | 6206aa8b2b9a45b4cf3ee31b7209b014be349fd9 (patch) | |
| tree | 72c4223a2cc21bf055948eadb3b314ed0568ae9d /arch/blackfin/include/asm/cache.h | |
| parent | 95f8e302c04c0b0c6de35ab399a5551605eeb006 (diff) | |
| parent | 9e42d0cf5020aaf217433cad1a224745241d212a (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/blackfin/include/asm/cache.h')
| -rw-r--r-- | arch/blackfin/include/asm/cache.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/cache.h b/arch/blackfin/include/asm/cache.h index 023d72133b5..86637814cf2 100644 --- a/arch/blackfin/include/asm/cache.h +++ b/arch/blackfin/include/asm/cache.h @@ -12,6 +12,11 @@ #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) #define SMP_CACHE_BYTES L1_CACHE_BYTES +#ifdef CONFIG_SMP +#define __cacheline_aligned +#else +#define ____cacheline_aligned + /* * Put cacheline_aliged data to L1 data memory */ @@ -21,9 +26,33 @@ __section__(".data_l1.cacheline_aligned"))) #endif +#endif + /* * largest L1 which this arch supports */ #define L1_CACHE_SHIFT_MAX 5 +#if defined(CONFIG_SMP) && \ + !defined(CONFIG_BFIN_CACHE_COHERENT) && \ + defined(CONFIG_BFIN_DCACHE) +#define __ARCH_SYNC_CORE_DCACHE +#ifndef __ASSEMBLY__ +asmlinkage void __raw_smp_mark_barrier_asm(void); +asmlinkage void __raw_smp_check_barrier_asm(void); + +static inline void smp_mark_barrier(void) +{ + __raw_smp_mark_barrier_asm(); +} +static inline void smp_check_barrier(void) +{ + __raw_smp_check_barrier_asm(); +} + +void resync_core_dcache(void); +#endif +#endif + + #endif |