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authorIngo Molnar <mingo@elte.hu>2009-02-11 10:17:42 +0100
committerIngo Molnar <mingo@elte.hu>2009-02-11 10:17:42 +0100
commitf437e8b53eab92a5829e65781e29aed23d8ffd0c (patch)
tree48982c8818a4ac5cddb84ca6a1d55620eb9680ee /arch/blackfin/include/asm/mem_init.h
parent140573d33b703194b7e1893711e78b7f546cca7c (diff)
parent8e4921515c1a379539607eb443d51c30f4f7f338 (diff)
Merge commit 'v2.6.29-rc4' into sched/core
Diffstat (limited to 'arch/blackfin/include/asm/mem_init.h')
-rw-r--r--arch/blackfin/include/asm/mem_init.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/blackfin/include/asm/mem_init.h b/arch/blackfin/include/asm/mem_init.h
index 255a9316ad3..61f7487fbf1 100644
--- a/arch/blackfin/include/asm/mem_init.h
+++ b/arch/blackfin/include/asm/mem_init.h
@@ -115,7 +115,7 @@
#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
/* Enable SCLK Out */
-#define mem_SDGCTL (0x80000000 | SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS)
+#define mem_SDGCTL (SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS)
#else
#define mem_SDRRC CONFIG_MEM_SDRRC
#define mem_SDGCTL CONFIG_MEM_SDGCTL