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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-22 21:12:27 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-22 21:12:27 -0700 |
| commit | 7f3883962870dd28b5f2322ac44a9d03640ef448 (patch) | |
| tree | 01f7dd2ac2b7c61e5e6726c4fec4484aaca6e7b7 /arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h | |
| parent | 10f2a2b0f68abf39c06cf519cbc1740fa50f900b (diff) | |
| parent | b9ac41e314f0b43641bc01bd553fd2e0458ed832 (diff) | |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (47 commits)
Blackfin: bfin_spi.h: add MMR peripheral layout
Blackfin: bfin_ppi.h: start a common PPI/EPPI header
Blackfin: bfin_can.h: add missing VERSION/VERSION2 MMRs
Blackfin: bf538: add missing SIC_RVECT define
Blackfin: bf561: rewrite SICA_xxx to just SIC_xxx
Blackfin: bf54x: add missing SIC_RVECT definition
Blackfin: H8606: move 8250 irqflags to platform resources
Blackfin: glue XIP/ROM kernel kconfigs
Blackfin: update sparse flags for latest upstream changes
Blackfin: coreb: update ioctl numbers
Blackfin: coreb: add gpl module license
Blackfin: bf518-ezkit: add ssm2603 codec resources
Blackfin: bf51x/bf52x: fix 16/32bit SPORT MMR helpers
Blackfin: tll6527m: new board port
Blackfin: bf526-ezbrd/bf527-ezkit: add NAND partition for u-boot
Blackfin: merge kernel init memory back into main memory region
Blackfin: gpio: add peripheral group check
Blackfin: dma: bf54x: add missing break for SPORT1 TX IRQ
Blackfin: add new cacheflush syscall
Blackfin: bf548-ezkit: increase u-boot partition size
...
Diffstat (limited to 'arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h')
| -rw-r--r-- | arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h index 11fb27bc427..3048b52bf46 100644 --- a/arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h +++ b/arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h @@ -279,14 +279,14 @@ #define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX, val) #define bfin_read_SPORT0_RX() bfin_read32(SPORT0_RX) #define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX, val) -#define bfin_read_SPORT0_TX32() bfin_read32(SPORT0_TX32) -#define bfin_write_SPORT0_TX32(val) bfin_write32(SPORT0_TX32, val) -#define bfin_read_SPORT0_RX32() bfin_read32(SPORT0_RX32) -#define bfin_write_SPORT0_RX32(val) bfin_write32(SPORT0_RX32, val) -#define bfin_read_SPORT0_TX16() bfin_read16(SPORT0_TX16) -#define bfin_write_SPORT0_TX16(val) bfin_write16(SPORT0_TX16, val) -#define bfin_read_SPORT0_RX16() bfin_read16(SPORT0_RX16) -#define bfin_write_SPORT0_RX16(val) bfin_write16(SPORT0_RX16, val) +#define bfin_read_SPORT0_TX32() bfin_read32(SPORT0_TX) +#define bfin_write_SPORT0_TX32(val) bfin_write32(SPORT0_TX, val) +#define bfin_read_SPORT0_RX32() bfin_read32(SPORT0_RX) +#define bfin_write_SPORT0_RX32(val) bfin_write32(SPORT0_RX, val) +#define bfin_read_SPORT0_TX16() bfin_read16(SPORT0_TX) +#define bfin_write_SPORT0_TX16(val) bfin_write16(SPORT0_TX, val) +#define bfin_read_SPORT0_RX16() bfin_read16(SPORT0_RX) +#define bfin_write_SPORT0_RX16(val) bfin_write16(SPORT0_RX, val) #define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR1) #define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR1, val) #define bfin_read_SPORT0_RCR2() bfin_read16(SPORT0_RCR2) @@ -334,14 +334,14 @@ #define bfin_write_SPORT1_TX(val) bfin_write32(SPORT1_TX, val) #define bfin_read_SPORT1_RX() bfin_read32(SPORT1_RX) #define bfin_write_SPORT1_RX(val) bfin_write32(SPORT1_RX, val) -#define bfin_read_SPORT1_TX32() bfin_read32(SPORT1_TX32) -#define bfin_write_SPORT1_TX32(val) bfin_write32(SPORT1_TX32, val) -#define bfin_read_SPORT1_RX32() bfin_read32(SPORT1_RX32) -#define bfin_write_SPORT1_RX32(val) bfin_write32(SPORT1_RX32, val) -#define bfin_read_SPORT1_TX16() bfin_read16(SPORT1_TX16) -#define bfin_write_SPORT1_TX16(val) bfin_write16(SPORT1_TX16, val) -#define bfin_read_SPORT1_RX16() bfin_read16(SPORT1_RX16) -#define bfin_write_SPORT1_RX16(val) bfin_write16(SPORT1_RX16, val) +#define bfin_read_SPORT1_TX32() bfin_read32(SPORT1_TX) +#define bfin_write_SPORT1_TX32(val) bfin_write32(SPORT1_TX, val) +#define bfin_read_SPORT1_RX32() bfin_read32(SPORT1_RX) +#define bfin_write_SPORT1_RX32(val) bfin_write32(SPORT1_RX, val) +#define bfin_read_SPORT1_TX16() bfin_read16(SPORT1_TX) +#define bfin_write_SPORT1_TX16(val) bfin_write16(SPORT1_TX, val) +#define bfin_read_SPORT1_RX16() bfin_read16(SPORT1_RX) +#define bfin_write_SPORT1_RX16(val) bfin_write16(SPORT1_RX, val) #define bfin_read_SPORT1_RCR1() bfin_read16(SPORT1_RCR1) #define bfin_write_SPORT1_RCR1(val) bfin_write16(SPORT1_RCR1, val) #define bfin_read_SPORT1_RCR2() bfin_read16(SPORT1_RCR2) |