diff options
| author | James Morris <jmorris@namei.org> | 2011-03-08 10:55:06 +1100 |
|---|---|---|
| committer | James Morris <jmorris@namei.org> | 2011-03-08 10:55:06 +1100 |
| commit | 1cc26bada9f6807814806db2f0d78792eecdac71 (patch) | |
| tree | 5509b5139db04af6c13db0a580c84116a4a54039 /arch/blackfin/mach-bf538/include/mach/pll.h | |
| parent | eae61f3c829439f8f9121b5cd48a14be04df451f (diff) | |
| parent | 214d93b02c4fe93638ad268613c9702a81ed9192 (diff) | |
Merge branch 'master'; commit 'v2.6.38-rc7' into next
Diffstat (limited to 'arch/blackfin/mach-bf538/include/mach/pll.h')
| -rw-r--r-- | arch/blackfin/mach-bf538/include/mach/pll.h | 64 |
1 files changed, 1 insertions, 63 deletions
diff --git a/arch/blackfin/mach-bf538/include/mach/pll.h b/arch/blackfin/mach-bf538/include/mach/pll.h index b30bbcd412a..94cca674d83 100644 --- a/arch/blackfin/mach-bf538/include/mach/pll.h +++ b/arch/blackfin/mach-bf538/include/mach/pll.h @@ -1,63 +1 @@ -/* - * Copyright 2008-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#ifndef _MACH_PLL_H -#define _MACH_PLL_H - -#include <asm/blackfin.h> -#include <asm/irqflags.h> - -/* Writing to PLL_CTL initiates a PLL relock sequence. */ -static __inline__ void bfin_write_PLL_CTL(unsigned int val) -{ - unsigned long flags, iwr0, iwr1; - - if (val == bfin_read_PLL_CTL()) - return; - - flags = hard_local_irq_save(); - /* Enable the PLL Wakeup bit in SIC IWR */ - iwr0 = bfin_read32(SIC_IWR0); - iwr1 = bfin_read32(SIC_IWR1); - /* Only allow PPL Wakeup) */ - bfin_write32(SIC_IWR0, IWR_ENABLE(0)); - bfin_write32(SIC_IWR1, 0); - - bfin_write16(PLL_CTL, val); - SSYNC(); - asm("IDLE;"); - - bfin_write32(SIC_IWR0, iwr0); - bfin_write32(SIC_IWR1, iwr1); - hard_local_irq_restore(flags); -} - -/* Writing to VR_CTL initiates a PLL relock sequence. */ -static __inline__ void bfin_write_VR_CTL(unsigned int val) -{ - unsigned long flags, iwr0, iwr1; - - if (val == bfin_read_VR_CTL()) - return; - - flags = hard_local_irq_save(); - /* Enable the PLL Wakeup bit in SIC IWR */ - iwr0 = bfin_read32(SIC_IWR0); - iwr1 = bfin_read32(SIC_IWR1); - /* Only allow PPL Wakeup) */ - bfin_write32(SIC_IWR0, IWR_ENABLE(0)); - bfin_write32(SIC_IWR1, 0); - - bfin_write16(VR_CTL, val); - SSYNC(); - asm("IDLE;"); - - bfin_write32(SIC_IWR0, iwr0); - bfin_write32(SIC_IWR1, iwr1); - hard_local_irq_restore(flags); -} - -#endif /* _MACH_PLL_H */ +#include <mach-common/pll.h> |