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authorMark Brown <broonie@opensource.wolfsonmicro.com>2011-04-18 18:07:43 +0100
committerMark Brown <broonie@opensource.wolfsonmicro.com>2011-04-18 18:07:43 +0100
commitd5381e42f64ca19f05c5799ffae5708acb6ed411 (patch)
tree8b5e757a9847047102c475c6c583afc191d02e5b /arch/ia64/sn/pci/pcibr/pcibr_dma.c
parentf030d60b30855e18ac5bf080fa9e576147623d18 (diff)
parentb3c27b51db9112d03864fdef44fa611dd69c1425 (diff)
ASoC: Merge branch 'for-2.6.39' into for-2.6.40
Fix trivial conflict caused by silly spelling fix patch. Conflicts: sound/soc/codecs/wm8994.c
Diffstat (limited to 'arch/ia64/sn/pci/pcibr/pcibr_dma.c')
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_dma.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
index c659ad5613a..33def666a66 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
@@ -227,7 +227,7 @@ pcibr_dma_unmap(struct pci_dev *hwdev, dma_addr_t dma_handle, int direction)
* after doing the read. For PIC this routine then forces a fake interrupt
* on another line, which is logically associated with the slot that the PIO
* is addressed to. It then spins while watching the memory location that
- * the interrupt is targetted to. When the interrupt response arrives, we
+ * the interrupt is targeted to. When the interrupt response arrives, we
* are sure that the DMA has landed in memory and it is safe for the driver
* to proceed. For TIOCP use the Device(x) Write Request Buffer Flush
* Bridge register since it ensures the data has entered the coherence domain,