diff options
| author | Patrick McHardy <kaber@trash.net> | 2011-04-13 13:32:28 +0200 |
|---|---|---|
| committer | Patrick McHardy <kaber@trash.net> | 2011-04-13 13:32:28 +0200 |
| commit | b32e3dc7860d00124fa432dba09667e647cb9bcc (patch) | |
| tree | 2fa6e56f389431dfb84609d3d7572cad76e88e71 /arch/m32r/platforms/oaks32r/setup.c | |
| parent | 6604271c5bc658a6067ed0c3deba4d89e0e50382 (diff) | |
| parent | 96120d86fe302c006259baee9061eea9e1b9e486 (diff) | |
Merge branch 'master' of ssh://master.kernel.org/pub/scm/linux/kernel/git/kaber/nf-2.6
Diffstat (limited to 'arch/m32r/platforms/oaks32r/setup.c')
| -rw-r--r-- | arch/m32r/platforms/oaks32r/setup.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/m32r/platforms/oaks32r/setup.c b/arch/m32r/platforms/oaks32r/setup.c index 19a02db7b81..83b46b067a1 100644 --- a/arch/m32r/platforms/oaks32r/setup.c +++ b/arch/m32r/platforms/oaks32r/setup.c @@ -74,39 +74,39 @@ void __init init_IRQ(void) #ifdef CONFIG_NE2000 /* INT3 : LAN controller (RTL8019AS) */ - set_irq_chip_and_handler(M32R_IRQ_INT3, &oaks32r_irq_type, + irq_set_chip_and_handler(M32R_IRQ_INT3, &oaks32r_irq_type, handle_level_irq); icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; disable_oaks32r_irq(M32R_IRQ_INT3); #endif /* CONFIG_M32R_NE2000 */ /* MFT2 : system timer */ - set_irq_chip_and_handler(M32R_IRQ_MFT2, &oaks32r_irq_type, + irq_set_chip_and_handler(M32R_IRQ_MFT2, &oaks32r_irq_type, handle_level_irq); icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; disable_oaks32r_irq(M32R_IRQ_MFT2); #ifdef CONFIG_SERIAL_M32R_SIO /* SIO0_R : uart receive data */ - set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &oaks32r_irq_type, + irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &oaks32r_irq_type, handle_level_irq); icu_data[M32R_IRQ_SIO0_R].icucr = 0; disable_oaks32r_irq(M32R_IRQ_SIO0_R); /* SIO0_S : uart send data */ - set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &oaks32r_irq_type, + irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &oaks32r_irq_type, handle_level_irq); icu_data[M32R_IRQ_SIO0_S].icucr = 0; disable_oaks32r_irq(M32R_IRQ_SIO0_S); /* SIO1_R : uart receive data */ - set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &oaks32r_irq_type, + irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &oaks32r_irq_type, handle_level_irq); icu_data[M32R_IRQ_SIO1_R].icucr = 0; disable_oaks32r_irq(M32R_IRQ_SIO1_R); /* SIO1_S : uart send data */ - set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type, + irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type, handle_level_irq); icu_data[M32R_IRQ_SIO1_S].icucr = 0; disable_oaks32r_irq(M32R_IRQ_SIO1_S); |