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authorGreg Ungerer <gerg@uclinux.org>2010-11-09 10:40:44 +1000
committerGreg Ungerer <gerg@uclinux.org>2011-01-05 15:19:18 +1000
commit3d461401eb5e3a8c471e92500aebd6c115273fba (patch)
tree9b8df3b3afb8f358851527db5c73b40dfc65228d /arch/m68k
parent278c2cbd59371bc8905d83b7cc3aa0bbe69c00f1 (diff)
m68knommu: move inclusion of ColdFire v4 cache registers
Move the inclusion of the version 4 cache controller registers so that it is with all the other register bit flag definitions. This makes it consistent with the other version core inclusion points, and means we don't need "#ifdef"ery in odd-ball places for these definitions. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/include/asm/cacheflush_no.h4
-rw-r--r--arch/m68k/include/asm/m5407sim.h2
-rw-r--r--arch/m68k/include/asm/m54xxsim.h2
-rw-r--r--arch/m68k/include/asm/mcfcache.h2
4 files changed, 5 insertions, 5 deletions
diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h
index e295923020d..52b11ac9a30 100644
--- a/arch/m68k/include/asm/cacheflush_no.h
+++ b/arch/m68k/include/asm/cacheflush_no.h
@@ -5,9 +5,7 @@
* (C) Copyright 2000-2004, Greg Ungerer <gerg@snapgear.com>
*/
#include <linux/mm.h>
-#if defined(CONFIG_M5407) || defined(CONFIG_M54xx)
-#include <asm/m54xxacr.h>
-#endif
+#include <asm/mcfsim.h>
#define flush_cache_all() __flush_cache_all()
#define flush_cache_mm(mm) do { } while (0)
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index ddfff88629f..75f5c28a551 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -17,6 +17,8 @@
#define CPU_NAME "COLDFIRE(m5407)"
#define CPU_INSTR_PER_JIFFY 3
+#include <asm/m54xxacr.h>
+
/*
* Define the 5407 SIM register set addresses.
*/
diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h
index a08a7ae776b..462ae532844 100644
--- a/arch/m68k/include/asm/m54xxsim.h
+++ b/arch/m68k/include/asm/m54xxsim.h
@@ -8,6 +8,8 @@
#define CPU_NAME "COLDFIRE(m54xx)"
#define CPU_INSTR_PER_JIFFY 2
+#include <asm/m54xxacr.h>
+
#define MCFINT_VECBASE 64
/*
diff --git a/arch/m68k/include/asm/mcfcache.h b/arch/m68k/include/asm/mcfcache.h
index 437686b62fe..2b3a6cfaaac 100644
--- a/arch/m68k/include/asm/mcfcache.h
+++ b/arch/m68k/include/asm/mcfcache.h
@@ -109,8 +109,6 @@
#if defined(CONFIG_M5407) || defined(CONFIG_M54xx)
-#include <asm/m54xxacr.h>
-
.macro CACHE_ENABLE
/* invalidate whole cache */
movel #(CACR_DCINVA+CACR_BCINVA+CACR_ICINVA),%d0