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authorDavid Daney <david.daney@cavium.com>2015-01-15 16:11:14 +0300
committerRalf Baechle <ralf@linux-mips.org>2015-02-20 15:31:43 +0100
commitdebe6a623d3cdc7f0374124830587fb8d1a04b63 (patch)
tree002af15bade64c15267e300e9a143eb09ca82d8e /arch/mips/cavium-octeon/setup.c
parente3d0ead59f6c1167c817ea338dd9395d517940e1 (diff)
MIPS: OCTEON: Update octeon-model.h code for new SoCs.
Add coverage for OCTEON III models. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8942/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon/setup.c')
-rw-r--r--arch/mips/cavium-octeon/setup.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 6c51ef6d57c..8d2b82327a7 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -655,7 +655,7 @@ void __init prom_init(void)
sysinfo->dfa_ref_clock_hz = octeon_bootinfo->dfa_ref_clock_hz;
sysinfo->bootloader_config_flags = octeon_bootinfo->config_flags;
- if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
+ if (OCTEON_IS_OCTEON2() || OCTEON_IS_OCTEON3()) {
/* I/O clock runs at a different rate than the CPU. */
union cvmx_mio_rst_boot rst_boot;
rst_boot.u64 = cvmx_read_csr(CVMX_MIO_RST_BOOT);