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| author | Ingo Molnar <mingo@elte.hu> | 2008-10-12 11:32:17 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-10-12 11:32:17 +0200 |
| commit | 206855c321adee56db3946ca09a5887cddb9d598 (patch) | |
| tree | 13a2729d4d0e37170552bd9ad3c6bba71ba0c55c /arch/mips/include/asm/cachectl.h | |
| parent | e8d3f455de4f42d4bab2f6f1aeb2cf3bd18eb508 (diff) | |
| parent | cb58ffc3889f0545628f138f849e759a331b8ddc (diff) | |
Merge branch 'x86/urgent' into core/signal
Conflicts:
arch/x86/kernel/signal_64.c
Diffstat (limited to 'arch/mips/include/asm/cachectl.h')
| -rw-r--r-- | arch/mips/include/asm/cachectl.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cachectl.h b/arch/mips/include/asm/cachectl.h new file mode 100644 index 00000000000..f3ce721861d --- /dev/null +++ b/arch/mips/include/asm/cachectl.h @@ -0,0 +1,26 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1994, 1995, 1996 by Ralf Baechle + */ +#ifndef _ASM_CACHECTL +#define _ASM_CACHECTL + +/* + * Options for cacheflush system call + */ +#define ICACHE (1<<0) /* flush instruction cache */ +#define DCACHE (1<<1) /* writeback and flush data cache */ +#define BCACHE (ICACHE|DCACHE) /* flush both caches */ + +/* + * Caching modes for the cachectl(2) call + * + * cachectl(2) is currently not supported and returns ENOSYS. + */ +#define CACHEABLE 0 /* make pages cacheable */ +#define UNCACHEABLE 1 /* make pages uncacheable */ + +#endif /* _ASM_CACHECTL */ |