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| author | Ingo Molnar <mingo@elte.hu> | 2008-11-26 08:22:50 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-11-26 08:22:50 +0100 |
| commit | 7fbb8759eff9a348efa5f352ffaa51c364837c4b (patch) | |
| tree | d40cd3f47b9f667ba94d9613270132080dcb6a1a /arch/mips/include/asm/cachectl.h | |
| parent | 6003ab0bad4cc56f3c4fadf62a0d23a967b9c53b (diff) | |
| parent | 13d428afc007fcfcd6deeb215618f54cf9c0cae6 (diff) | |
Merge commit 'v2.6.28-rc6' into core/debug
Diffstat (limited to 'arch/mips/include/asm/cachectl.h')
| -rw-r--r-- | arch/mips/include/asm/cachectl.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cachectl.h b/arch/mips/include/asm/cachectl.h new file mode 100644 index 00000000000..f3ce721861d --- /dev/null +++ b/arch/mips/include/asm/cachectl.h @@ -0,0 +1,26 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1994, 1995, 1996 by Ralf Baechle + */ +#ifndef _ASM_CACHECTL +#define _ASM_CACHECTL + +/* + * Options for cacheflush system call + */ +#define ICACHE (1<<0) /* flush instruction cache */ +#define DCACHE (1<<1) /* writeback and flush data cache */ +#define BCACHE (ICACHE|DCACHE) /* flush both caches */ + +/* + * Caching modes for the cachectl(2) call + * + * cachectl(2) is currently not supported and returns ENOSYS. + */ +#define CACHEABLE 0 /* make pages cacheable */ +#define UNCACHEABLE 1 /* make pages uncacheable */ + +#endif /* _ASM_CACHECTL */ |