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authorAlexander Graf <agraf@suse.de>2012-10-31 13:36:18 +0100
committerAlexander Graf <agraf@suse.de>2012-10-31 13:36:18 +0100
commit0588000eac9ba4178cebade437da3b28e8fad48f (patch)
tree697e514a0a0193f17a54f372dd18c5cd3927e154 /arch/mips/include/asm/cpu-features.h
parent8b5869ad85f703ffeb25e656eab826f6b85b984c (diff)
parent81c52c56e2b43589091ee29038bcf793d3f184ab (diff)
Merge commit 'origin/queue' into for-queue
Conflicts: arch/powerpc/include/asm/Kbuild arch/powerpc/include/uapi/asm/Kbuild
Diffstat (limited to 'arch/mips/include/asm/cpu-features.h')
-rw-r--r--arch/mips/include/asm/cpu-features.h12
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index ca400f7c3f5..c507b931b48 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -95,8 +95,8 @@
#ifndef cpu_has_smartmips
#define cpu_has_smartmips (cpu_data[0].ases & MIPS_ASE_SMARTMIPS)
#endif
-#ifndef kernel_uses_smartmips_rixi
-#define kernel_uses_smartmips_rixi 0
+#ifndef cpu_has_rixi
+#define cpu_has_rixi (cpu_data[0].options & MIPS_CPU_RIXI)
#endif
#ifndef cpu_has_vtag_icache
#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
@@ -171,6 +171,10 @@
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
#endif
+#ifndef cpu_has_dsp2
+#define cpu_has_dsp2 (cpu_data[0].ases & MIPS_ASE_DSP2P)
+#endif
+
#ifndef cpu_has_mipsmt
#define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT)
#endif
@@ -252,4 +256,8 @@
#define cpu_hwrena_impl_bits 0
#endif
+#ifndef cpu_has_perf_cntr_intr_bit
+#define cpu_has_perf_cntr_intr_bit (cpu_data[0].options & MIPS_CPU_PCI)
+#endif
+
#endif /* __ASM_CPU_FEATURES_H */