Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (46 commits)
  ftrace/MIPS: Enable C Version of recordmcount
  ftrace/MIPS: Add module support for C version of recordmcount
  ftrace/MIPS: Add MIPS64 support for C version of recordmcount
  MIPS: Make TASK_SIZE reflect proper size for both 32 and 64 bit processes.
  MIPS: Allow UserLocal on MIPS_R1 processors
  MIPS: Honor L2 bypass bit
  MIPS: Add BMIPS CP0 register definitions
  MIPS: Add BMIPS processor types to Kconfig
  MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code
  MIPS: Add support for hardware performance events (mipsxx)
  MIPS: Perf-events: Add callchain support
  MIPS: add support for hardware performance events (skeleton)
  MIPS: add support for software performance events
  MIPS: define local_xchg from xchg_local to atomic_long_xchg
  MIPS: AR7: Add support for Titan (TNETV10xx) SoC variant
  MIPS: AR7: Initialize GPIO earlier
  MIPS: Add platform device and Kconfig for Octeon USB EHCI / OHCI
  USB: Add EHCI and OHCH glue for OCTEON II SOCs.
  MIPS: Octeon: Add register definitions for EHCI / OHCI USB glue logic.
  MIPS: Octeon: Apply CN63XXP1 errata workarounds.
  ...

1 files changed, 25 insertions, 0 deletions

diff --git a/arch/mips/include/asm/perf_event.h b/arch/mips/include/asm/perf_event.h
new file mode 100644
index 00000000000..e00007cf816
--- /dev/null
+++ b/arch/mips/include/asm/perf_event.h
@@ -0,0 +1,25 @@
+/*
+ * linux/arch/mips/include/asm/perf_event.h
+ *
+ * Copyright (C) 2010 MIPS Technologies, Inc.
+ * Author: Deng-Cheng Zhu
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __MIPS_PERF_EVENT_H__
+#define __MIPS_PERF_EVENT_H__
+
+/*
+ * MIPS performance counters do not raise NMI upon overflow, a regular
+ * interrupt will be signaled. Hence we can do the pending perf event
+ * work at the tail of the irq handler.
+ */
+static inline void
+set_perf_event_pending(void)
+{
+}
+
+#endif /* __MIPS_PERF_EVENT_H__ */