Merge tag 'boards-3.12' of git://git.infradead.org/linux-mvebu into next/boards

From Jason Cooper:
mvebu boards changes for v3.12

 - convert kirkwood, dove, orion5x to DT init of mv643xx_eth
    - _lots_ of board code removal :)
 - convert kirkwood, dove and orion5x to DT init of clocksource and irqchip

* tag 'boards-3.12' of git://git.infradead.org/linux-mvebu:
  ARM: plat-orion: add reg offset to DT irq driver stub
  ARM: kirkwood: remove obsolete SDIO clock gate workaround
  ARM: kirkwood: convert to DT irqchip and clocksource
  ARM: dove: convert to DT irqchip and clocksource
  ARM: orion5x: update intc device tree node to new reg layout
  ARM: kirkwood: move device tree nodes to DT irqchip and clocksource
  ARM: dove: move device tree nodes to DT irqchip and clocksource
  ARM: orion5x: remove legacy mv643xx_eth board setup
  ARM: kirkwood: remove legacy clk alias for mv643xx_eth
  ARM: kirkwood: remove redundant DT board files
  ARM: dove: remove legacy mv643xx_eth setup
  ARM: orion5x: add gigabit ethernet and mvmdio device tree nodes
  ARM: kirkwood: add gigabit ethernet and mvmdio device tree nodes
  ARM: dove: add gigabit ethernet and mvmdio device tree nodes
  + Linux 3.11-rc2

Signed-off-by: Olof Johansson <olof@lixom.net>

1 files changed, 6 insertions, 7 deletions

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 0903d70b2cf..aec3408edd4 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -90,7 +90,7 @@ void (*board_nmi_handler_setup)(void);
 void (*board_ejtag_handler_setup)(void);
 void (*board_bind_eic_interrupt)(int irq, int regset);
 void (*board_ebase_setup)(void);
-void __cpuinitdata(*board_cache_error_setup)(void);
+void(*board_cache_error_setup)(void);
 
 static void show_raw_backtrace(unsigned long reg29)
 {
@@ -1242,7 +1242,6 @@ asmlinkage void do_mcheck(struct pt_regs *regs)
 	panic("Caught Machine Check exception - %scaused by multiple "
 	      "matching entries in the TLB.",
 	      (multi_match) ? "" : "not ");
-	exception_exit(prev_state);
 }
 
 asmlinkage void do_mt(struct pt_regs *regs)
@@ -1682,7 +1681,7 @@ int cp0_compare_irq_shift;
 int cp0_perfcount_irq;
 EXPORT_SYMBOL_GPL(cp0_perfcount_irq);
 
-static int __cpuinitdata noulri;
+static int noulri;
 
 static int __init ulri_disable(char *s)
 {
@@ -1693,7 +1692,7 @@ static int __init ulri_disable(char *s)
 }
 __setup("noulri", ulri_disable);
 
-void __cpuinit per_cpu_trap_init(bool is_boot_cpu)
+void per_cpu_trap_init(bool is_boot_cpu)
 {
 	unsigned int cpu = smp_processor_id();
 	unsigned int status_set = ST0_CU0;
@@ -1810,7 +1809,7 @@ void __cpuinit per_cpu_trap_init(bool is_boot_cpu)
 }
 
 /* Install CPU exception handler */
-void __cpuinit set_handler(unsigned long offset, void *addr, unsigned long size)
+void set_handler(unsigned long offset, void *addr, unsigned long size)
 {
 #ifdef CONFIG_CPU_MICROMIPS
 	memcpy((void *)(ebase + offset), ((unsigned char *)addr - 1), size);
@@ -1820,7 +1819,7 @@ void __cpuinit set_handler(unsigned long offset, void *addr, unsigned long size)
 	local_flush_icache_range(ebase + offset, ebase + offset + size);
 }
 
-static char panic_null_cerr[] __cpuinitdata =
+static char panic_null_cerr[] =
 	"Trying to set NULL cache error exception handler";
 
 /*
@@ -1828,7 +1827,7 @@ static char panic_null_cerr[] __cpuinitdata =
  * This is suitable only for the cache error exception which is the only
  * exception handler that is being run uncached.
  */
-void __cpuinit set_uncached_handler(unsigned long offset, void *addr,
+void set_uncached_handler(unsigned long offset, void *addr,
 	unsigned long size)
 {
 	unsigned long uncached_ebase = CKSEG1ADDR(ebase);