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authorDavid S. Miller <davem@davemloft.net>2006-01-31 18:34:51 -0800
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 01:11:29 -0800
commit86b818687d4894063ecd1190e54717a0cce8c009 (patch)
treed2951295358502c88f7fe0c02517d729cff4eb9a /arch/mips/mips-boards/generic/mipsIRQ.S
parent9954863975910a1b9372b7d5006a6cba43bdd288 (diff)
[SPARC64]: Fix race in LOAD_PER_CPU_BASE()
Since we use %g5 itself as a temporary, it can get clobbered if we take an interrupt mid-stream and thus cause end up with the final %g5 value too early as a result of rtrap processing. Set %g5 at the very end, atomically, to avoid this problem. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/mips/mips-boards/generic/mipsIRQ.S')
0 files changed, 0 insertions, 0 deletions