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author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-03-21 13:05:45 -0600 |
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committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-03-21 13:05:45 -0600 |
commit | d04cdb64212eb5ae6a98026a97dda626e40e8e9a (patch) | |
tree | b6a7dbb21ccfceb915844e9a330b3d3dfcaf3c5b /arch/mips/mips-boards/sim/sim_IRQ.c | |
parent | 2f8600dff2b140096a7df781884e918a16aa90e0 (diff) | |
parent | ec1248e70edc5cf7b485efcc7b41e44e10f422e5 (diff) |
Merge ../linux-2.6
Diffstat (limited to 'arch/mips/mips-boards/sim/sim_IRQ.c')
-rw-r--r-- | arch/mips/mips-boards/sim/sim_IRQ.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mips-boards/sim/sim_IRQ.c b/arch/mips/mips-boards/sim/sim_IRQ.c index 9987a85aabe..5b84c7fe102 100644 --- a/arch/mips/mips-boards/sim/sim_IRQ.c +++ b/arch/mips/mips-boards/sim/sim_IRQ.c @@ -96,7 +96,7 @@ andi a0, s0, CAUSEF_IP3 # delay slot, check hw1 interrupt #else beq a0, zero, 1f # delay slot, check hw3 interrupt - andi a0, s0, CAUSEF_IP5 + andi a0, s0, CAUSEF_IP5 #endif /* Wheee, combined hardware level zero interrupt. */ |