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author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-02-27 16:19:22 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-02-27 16:19:22 -0800 |
commit | f1dd6ad599732fc89f36fdd65a2c2cf3c63a8711 (patch) | |
tree | 5092207128e47cba99dc0fe373fff6a36f4cb4b8 /arch/mips/mm/uasm.c | |
parent | 8d37a371b6869920e6c40c495c68eabba1ef3909 (diff) | |
parent | e10b234b3c4e255d3300a486c4ac15b43253ac6d (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (141 commits)
MIPS: Alchemy: defconfig updates
MIPS: Alchemy: Fix Au1100 ethernet build failure
MIPS: Alchemy: Repair db1500/bosporus builds
MIPS: ARC: Cleanup unused definitions from sgialib.h
MIPS: Cobalt: convert legacy port addresses to GT-64111 bus addresses
MIPS: Alchemy: use 36bit addresses for PCMCIA resources.
MIPS: Cobalt: Fix theoretical port aliasing issue
MIPS: Use ALIGN(x, bytes) instead of __ALIGN_MASK(x, bytes - 1)
MIPS: Crazy spinlock speed test.
MIPS: Optimize spinlocks.
MIPS: Alchemy: devboard PM needs to save CPLD registers.
MIPS: PowerTV: Eliminate duplicate opcode definition macros
MIPS: Lemote 2F: Move printks out of port_access_lock.
MIPS: PNX833x: Convert IRQ controller locks to raw spinlocks.
MIPS: Octeon: Replace spinlock with raw_spinlocks in dma-octeon.c.
MIPS: Octeon: Replace rwlocks in irq_chip handlers with raw_spinlocks.
MIPS: Octeon: Convert octeon_irq_msi_lock to raw spinlock.
MIPS: Loongson: Remove pointless sample_lock from oprofile code.
MIPS: SNI: Convert sni_rm200_i8259A_lock to raw spinlock.
MIPS: i8259: Convert IRQ controller lock to raw spinlock.
...
Diffstat (limited to 'arch/mips/mm/uasm.c')
-rw-r--r-- | arch/mips/mm/uasm.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c index 0a165c5179a..1581e985246 100644 --- a/arch/mips/mm/uasm.c +++ b/arch/mips/mm/uasm.c @@ -19,8 +19,7 @@ #include <asm/inst.h> #include <asm/elf.h> #include <asm/bugs.h> - -#include "uasm.h" +#include <asm/uasm.h> enum fields { RS = 0x001, @@ -63,8 +62,9 @@ enum opcode { insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal, insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd, - insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw, - insn_tlbp, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, insn_dins + insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw, + insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, + insn_dins }; struct insn { @@ -126,9 +126,11 @@ static struct insn insn_table[] __cpuinitdata = { { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE }, + { insn_rotr, M(spec_op, 1, 0, 0, 0, srl_op), RT | RD | RE }, { insn_subu, M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD }, { insn_sw, M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, { insn_tlbp, M(cop0_op, cop_op, 0, 0, 0, tlbp_op), 0 }, + { insn_tlbr, M(cop0_op, cop_op, 0, 0, 0, tlbr_op), 0 }, { insn_tlbwi, M(cop0_op, cop_op, 0, 0, 0, tlbwi_op), 0 }, { insn_tlbwr, M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0 }, { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD }, @@ -379,9 +381,11 @@ I_u2s3u1(_sd) I_u2u1u3(_sll) I_u2u1u3(_sra) I_u2u1u3(_srl) +I_u2u1u3(_rotr) I_u3u1u2(_subu) I_u2s3u1(_sw) I_0(_tlbp) +I_0(_tlbr) I_0(_tlbwi) I_0(_tlbwr) I_u3u1u2(_xor) |