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authorDaniel Vetter <daniel.vetter@ffwll.ch>2013-12-09 09:17:02 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-12-09 09:19:14 +0100
commitf7698ba75fa283435f5077b9dfb4319d28b9de9a (patch)
tree4bc16a615a35baaf2b482de81cd256a69067ff72 /arch/parisc/mm/fault.c
parent798183c54799fbe1e5a5bfabb3a8c0505ffd2149 (diff)
parent374b105797c3d4f29c685f3be535c35f5689b30e (diff)
Merge tag 'v3.13-rc3' into drm-intel-next-queued
Linux 3.13-rc3 I need a backmerge for two reasons: - For merging the ppgtt patches from Ben I need to pull in the bdw support. - We now have duplicated calls to intel_uncore_forcewake_reset in the setup code to due 2 different patches merged into -next and 3.13. The conflict is silen so I need the merge to be able to apply Deepak's fixup patch. Conflicts: drivers/gpu/drm/i915/intel_display.c Trivial conflict, it doesn't even show up in the merge diff. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'arch/parisc/mm/fault.c')
-rw-r--r--arch/parisc/mm/fault.c42
1 files changed, 38 insertions, 4 deletions
diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c
index 0293588d5b8..9d08c71a967 100644
--- a/arch/parisc/mm/fault.c
+++ b/arch/parisc/mm/fault.c
@@ -142,6 +142,12 @@ int fixup_exception(struct pt_regs *regs)
{
const struct exception_table_entry *fix;
+ /* If we only stored 32bit addresses in the exception table we can drop
+ * out if we faulted on a 64bit address. */
+ if ((sizeof(regs->iaoq[0]) > sizeof(fix->insn))
+ && (regs->iaoq[0] >> 32))
+ return 0;
+
fix = search_exception_tables(regs->iaoq[0]);
if (fix) {
struct exception_data *d;
@@ -274,12 +280,40 @@ bad_area:
}
show_regs(regs);
#endif
- /* FIXME: actually we need to get the signo and code correct */
- si.si_signo = SIGSEGV;
+ switch (code) {
+ case 15: /* Data TLB miss fault/Data page fault */
+ /* send SIGSEGV when outside of vma */
+ if (!vma ||
+ address < vma->vm_start || address > vma->vm_end) {
+ si.si_signo = SIGSEGV;
+ si.si_code = SEGV_MAPERR;
+ break;
+ }
+
+ /* send SIGSEGV for wrong permissions */
+ if ((vma->vm_flags & acc_type) != acc_type) {
+ si.si_signo = SIGSEGV;
+ si.si_code = SEGV_ACCERR;
+ break;
+ }
+
+ /* probably address is outside of mapped file */
+ /* fall through */
+ case 17: /* NA data TLB miss / page fault */
+ case 18: /* Unaligned access - PCXS only */
+ si.si_signo = SIGBUS;
+ si.si_code = (code == 18) ? BUS_ADRALN : BUS_ADRERR;
+ break;
+ case 16: /* Non-access instruction TLB miss fault */
+ case 26: /* PCXL: Data memory access rights trap */
+ default:
+ si.si_signo = SIGSEGV;
+ si.si_code = (code == 26) ? SEGV_ACCERR : SEGV_MAPERR;
+ break;
+ }
si.si_errno = 0;
- si.si_code = SEGV_MAPERR;
si.si_addr = (void __user *) address;
- force_sig_info(SIGSEGV, &si, current);
+ force_sig_info(si.si_signo, &si, current);
return;
}