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authorFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>2012-01-28 19:52:40 +0000
committerFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>2012-01-28 19:52:40 +0000
commitb20f86625de738658c74f2ecfe4050416d2252cc (patch)
treeb84216b70bd923409217834a953f983700e39eda /arch/powerpc/include/asm/mpic.h
parent9f1065032ceb7e86c7c9f16bb86518857e88a172 (diff)
parentdcd6c92267155e70a94b3927bce681ce74b80d1f (diff)
Merge commit 'v3.3-rc1' into fbdev-next
Diffstat (limited to 'arch/powerpc/include/asm/mpic.h')
-rw-r--r--arch/powerpc/include/asm/mpic.h14
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index e6fae49e0b7..67b4d983723 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -251,6 +251,9 @@ struct mpic_irq_save {
/* The instance data of a given MPIC */
struct mpic
{
+ /* The OpenFirmware dt node for this MPIC */
+ struct device_node *node;
+
/* The remapper for this MPIC */
struct irq_host *irqhost;
@@ -293,6 +296,9 @@ struct mpic
/* Register access method */
enum mpic_reg_type reg_type;
+ /* The physical base address of the MPIC */
+ phys_addr_t paddr;
+
/* The various ioremap'ed bases */
struct mpic_reg_bank gregs;
struct mpic_reg_bank tmregs;
@@ -331,11 +337,11 @@ struct mpic
* Note setting any ID (leaving those bits to 0) means standard MPIC
*/
-/* This is the primary controller, only that one has IPIs and
- * has afinity control. A non-primary MPIC always uses CPU0
- * registers only
+/*
+ * This is a secondary ("chained") controller; it only uses the CPU0
+ * registers. Primary controllers have IPIs and affinity control.
*/
-#define MPIC_PRIMARY 0x00000001
+#define MPIC_SECONDARY 0x00000001
/* Set this for a big-endian MPIC */
#define MPIC_BIG_ENDIAN 0x00000002