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authorIngo Molnar <mingo@elte.hu>2008-07-30 19:36:55 +0200
committerIngo Molnar <mingo@elte.hu>2008-07-30 19:36:55 +0200
commitbc588df79ebfb710abc27342fccf336a68ed1216 (patch)
treee50e125eaa6da83fa715704e53c1bde013d1ef8e /arch/powerpc/lib/dma-noncoherent.c
parentbce7f793daec3e65ec5c5705d2457b81fe7b5725 (diff)
parent15dd859cacf312f606f54502d1f66537a1e5c78c (diff)
Merge branch 'x86/core' into x86/xsave
Diffstat (limited to 'arch/powerpc/lib/dma-noncoherent.c')
-rw-r--r--arch/powerpc/lib/dma-noncoherent.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/powerpc/lib/dma-noncoherent.c b/arch/powerpc/lib/dma-noncoherent.c
index 6656d47841d..5d83907f659 100644
--- a/arch/powerpc/lib/dma-noncoherent.c
+++ b/arch/powerpc/lib/dma-noncoherent.c
@@ -348,8 +348,15 @@ void __dma_sync(void *vaddr, size_t size, int direction)
switch (direction) {
case DMA_NONE:
BUG();
- case DMA_FROM_DEVICE: /* invalidate only */
- invalidate_dcache_range(start, end);
+ case DMA_FROM_DEVICE:
+ /*
+ * invalidate only when cache-line aligned otherwise there is
+ * the potential for discarding uncommitted data from the cache
+ */
+ if ((start & (L1_CACHE_BYTES - 1)) || (size & (L1_CACHE_BYTES - 1)))
+ flush_dcache_range(start, end);
+ else
+ invalidate_dcache_range(start, end);
break;
case DMA_TO_DEVICE: /* writeback only */
clean_dcache_range(start, end);