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authorStephen Rothwell <sfr@canb.auug.org.au>2005-10-17 11:50:32 +1000
committerStephen Rothwell <sfr@canb.auug.org.au>2005-10-17 11:50:32 +1000
commit7dffb72028bfd909ac51a1546d182de2df4d2426 (patch)
treec465c35642872973543f710f8aa06b955b84f7e5 /arch/ppc/kernel/l2cr.S
parentcf764855620aa1aa5b134687ca18b841ac9be4c7 (diff)
ppc32: use L1_CACHE_SHIFT/L1_CACHE_BYTES
instead of L1_CACHE_LINE_SIZE and LG_L1_CACHE_LINE_SIZE Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'arch/ppc/kernel/l2cr.S')
-rw-r--r--arch/ppc/kernel/l2cr.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ppc/kernel/l2cr.S b/arch/ppc/kernel/l2cr.S
index 861115249b3..d7f4e982b53 100644
--- a/arch/ppc/kernel/l2cr.S
+++ b/arch/ppc/kernel/l2cr.S
@@ -203,7 +203,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
* L1 icache
*/
b 20f
- .balign L1_CACHE_LINE_SIZE
+ .balign L1_CACHE_BYTES
22:
sync
mtspr SPRN_L2CR,r3