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| author | Thomas Gleixner <tglx@linutronix.de> | 2011-03-12 13:22:22 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2011-03-12 13:22:28 +0100 |
| commit | cfe08bba1e0017d94a8f738a195d3a2b479327e3 (patch) | |
| tree | 4546939fd9fbddc978b6eaa0299b03177e9e643b /arch/s390/include/asm/cache.h | |
| parent | 58bff947e2d164c7e5cbf7f485e4b3d4884befeb (diff) | |
| parent | abb0052289e58140d933b29491f59e4be0a19727 (diff) | |
Merge branch 'x86/apic' into x86/irq
Reason: Update to latest genirq code conflicts with pending apic
changes
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/s390/include/asm/cache.h')
| -rw-r--r-- | arch/s390/include/asm/cache.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/s390/include/asm/cache.h b/arch/s390/include/asm/cache.h index 24aafa68b64..2a30d5ac066 100644 --- a/arch/s390/include/asm/cache.h +++ b/arch/s390/include/asm/cache.h @@ -13,6 +13,7 @@ #define L1_CACHE_BYTES 256 #define L1_CACHE_SHIFT 8 +#define NET_SKB_PAD 32 #define __read_mostly __attribute__((__section__(".data..read_mostly"))) |