diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-07-29 11:54:24 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-07-29 11:54:24 +0200 |
commit | 3825c9e8d01e4310c40a3903a354c433c32a7b6f (patch) | |
tree | 87c94a8076bbb38bd2cf20ab9bc23d6f74f6a0a8 /arch/sh/drivers/pci/ops-sh7785lcr.c | |
parent | 5d7b605245b1aa1a9cd6549b1f57d69273eb0c37 (diff) | |
parent | 6e86841d05f371b5b9b86ce76c02aaee83352298 (diff) |
Merge commit 'v2.6.27-rc1' into x86/microcode
Conflicts:
arch/x86/kernel/microcode.c
Manual resolutions:
arch/x86/kernel/microcode_amd.c
arch/x86/kernel/microcode_intel.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/sh/drivers/pci/ops-sh7785lcr.c')
-rw-r--r-- | arch/sh/drivers/pci/ops-sh7785lcr.c | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/arch/sh/drivers/pci/ops-sh7785lcr.c b/arch/sh/drivers/pci/ops-sh7785lcr.c new file mode 100644 index 00000000000..b3bd6870205 --- /dev/null +++ b/arch/sh/drivers/pci/ops-sh7785lcr.c @@ -0,0 +1,66 @@ +/* + * Author: Ian DaSilva (idasilva@mvista.com) + * + * Highly leveraged from pci-bigsur.c, written by Dustin McIntire. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * PCI initialization for the Renesas R0P7785LC0011RL board + * Based on arch/sh/drivers/pci/ops-r7780rp.c + * + */ +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pci.h> +#include "pci-sh4.h" + +static char irq_tab[] __initdata = { + 65, 66, 67, 68, +}; + +int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) +{ + return irq_tab[slot]; +} + +static struct resource sh7785_io_resource = { + .name = "SH7785_IO", + .start = SH7780_PCI_IO_BASE, + .end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1, + .flags = IORESOURCE_IO +}; + +static struct resource sh7785_mem_resource = { + .name = "SH7785_mem", + .start = SH7780_PCI_MEMORY_BASE, + .end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1, + .flags = IORESOURCE_MEM +}; + +struct pci_channel board_pci_channels[] = { + { &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff }, + { NULL, NULL, NULL, 0, 0 }, +}; +EXPORT_SYMBOL(board_pci_channels); + +static struct sh4_pci_address_map sh7785_pci_map = { + .window0 = { + .base = SH7780_CS2_BASE_ADDR, + .size = 0x04000000, + }, + + .window1 = { + .base = SH7780_CS3_BASE_ADDR, + .size = 0x04000000, + }, + + .flags = SH4_PCIC_NO_RESET, +}; + +int __init pcibios_init_platform(void) +{ + return sh7780_pcic_init(&sh7785_pci_map); +} |