summaryrefslogtreecommitdiffstats
path: root/arch/sh/include/cpu-sh2a
diff options
context:
space:
mode:
authorPaul Mundt <lethal@linux-sh.org>2009-08-15 12:38:29 +0900
committerPaul Mundt <lethal@linux-sh.org>2009-08-15 12:38:29 +0900
commita58e1a2ab4f6334c50dfbda83d3a5c6e0b2b4bee (patch)
tree6c9470da2d4da8579ca534a6037da193c74cc9cd /arch/sh/include/cpu-sh2a
parent109b44a82a7a8ae32d7fb257480f92f2d96f0daf (diff)
sh: Convert SH-2A to new cacheflush interface.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/cpu-sh2a')
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/cacheflush.h30
1 files changed, 0 insertions, 30 deletions
diff --git a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h b/arch/sh/include/cpu-sh2a/cpu/cacheflush.h
deleted file mode 100644
index 32a529187a3..00000000000
--- a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h
+++ /dev/null
@@ -1,30 +0,0 @@
-#ifndef __ASM_CPU_SH2A_CACHEFLUSH_H
-#define __ASM_CPU_SH2A_CACHEFLUSH_H
-
-/*
- * Cache flushing:
- *
- * - flush_cache_all() flushes entire cache
- * - flush_cache_mm(mm) flushes the specified mm context's cache lines
- * - flush_cache_dup mm(mm) handles cache flushing when forking
- * - flush_cache_page(mm, vmaddr, pfn) flushes a single page
- * - flush_cache_range(vma, start, end) flushes a range of pages
- *
- * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
- * - flush_icache_range(start, end) flushes(invalidates) a range for icache
- * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
- *
- * Caches are indexed (effectively) by physical address on SH-2, so
- * we don't need them.
- */
-#define flush_cache_all() do { } while (0)
-#define flush_cache_mm(mm) do { } while (0)
-#define flush_cache_dup_mm(mm) do { } while (0)
-#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
-#define flush_dcache_page(page) do { } while (0)
-void flush_icache_range(unsigned long start, unsigned long end);
-#define flush_icache_page(vma,pg) do { } while (0)
-#define flush_cache_sigtramp(vaddr) do { } while (0)
-
-#endif /* __ASM_CPU_SH2A_CACHEFLUSH_H */