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authorLinus Torvalds <torvalds@linux-foundation.org>2008-01-29 08:52:50 +1100
committerLinus Torvalds <torvalds@linux-foundation.org>2008-01-29 08:52:50 +1100
commite189f3495c4e30fc84fc9241096edf3932e23439 (patch)
tree5916c89ace81537a02ae01869386ba6caafdab9c /arch/sh/kernel/cpu/sh3/probe.c
parentf4798748dee00c807a63f5518f08b3df161e0f6d (diff)
parent6582d7b7376aa587d74b08c74457dc28abc1a9fa (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (197 commits) sh: add spi header and r2d platform data V3 sh: update r7780rp interrupt code sh: remove consistent alloc stuff from the machine vector sh: use declared coherent memory for dreamcast pci ethernet adapter sh: declared coherent memory support V2 sh: Add support for SDK7780 board. sh: constify function pointer tables sh: Kill off -traditional for linker script. cdrom: Add support for Sega Dreamcast GD-ROM. sh: Kill off hs7751rvoip reference from arch/sh/Kconfig. sh: Drop r7780rp_defconfig, use r7780mp_defconfig as kbuild default. sh: Kill off dead HS771RVoIP board support. sh: r7785rp: Fix up DECLARE_INTC_DESC() arg mismatch. sh: r7785rp: Hook up the rest of the HL7785 FPGA IRQ vectors. sh: r2d - enable sm501 usb host function sh: remove voyagergx sh: r2d - add lcd planel timings to sm501 platform data sh: Add OHCI and UDC platform devices for SH7720. sh: intc - remove default interrupt priority tables sh: Correct pte size mismatch for X2 TLB. ...
Diffstat (limited to 'arch/sh/kernel/cpu/sh3/probe.c')
-rw-r--r--arch/sh/kernel/cpu/sh3/probe.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index bf579e061e0..fcc80bb7bee 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -16,11 +16,11 @@
#include <asm/cache.h>
#include <asm/io.h>
-int __init detect_cpu_and_cache_system(void)
+int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
{
unsigned long addr0, addr1, data0, data1, data2, data3;
- jump_to_P2();
+ jump_to_uncached();
/*
* Check if the entry shadows or not.
* When shadowed, it's 128-entry system.
@@ -48,7 +48,7 @@ int __init detect_cpu_and_cache_system(void)
ctrl_outl(data0&~SH_CACHE_VALID, addr0);
ctrl_outl(data2&~SH_CACHE_VALID, addr1);
- back_to_P1();
+ back_to_cached();
boot_cpu_data.dcache.ways = 4;
boot_cpu_data.dcache.entry_shift = 4;
@@ -84,6 +84,9 @@ int __init detect_cpu_and_cache_system(void)
#if defined(CONFIG_CPU_SUBTYPE_SH7720)
boot_cpu_data.type = CPU_SH7720;
#endif
+#if defined(CONFIG_CPU_SUBTYPE_SH7721)
+ boot_cpu_data.type = CPU_SH7721;
+#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
boot_cpu_data.type = CPU_SH7705;