diff options
| author | Paul Mundt <lethal@linux-sh.org> | 2010-04-20 15:37:23 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-04-20 15:37:23 +0900 |
| commit | 88253e845996670f56635b054550fa45e1fec3d8 (patch) | |
| tree | b8263438256290127d4c845de9929164dc725cfd /arch/sh/mm | |
| parent | 1d5cc550ede76825ab401941fb1165f2056e2c46 (diff) | |
sh: Zero out aliases counter when using SH-X3 hardware assistance.
This zeroes out the number of cache aliases in the cache info descriptors
when hardware alias avoidance is enabled. This cuts down on the amount of
flushing taken care of by common code, and also permits coherency control
to be disabled for the single CPU and 4k page size case.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm')
| -rw-r--r-- | arch/sh/mm/cache-shx3.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/sh/mm/cache-shx3.c b/arch/sh/mm/cache-shx3.c index 65936c4fef0..c0adbee97b5 100644 --- a/arch/sh/mm/cache-shx3.c +++ b/arch/sh/mm/cache-shx3.c @@ -21,9 +21,18 @@ void __init shx3_cache_init(void) ccr = __raw_readl(CCR); - if (boot_cpu_data.dcache.n_aliases) + /* + * If we've got cache aliases, resolve them in hardware. + */ + if (boot_cpu_data.dcache.n_aliases || boot_cpu_data.icache.n_aliases) { ccr |= CCR_CACHE_SNM; + boot_cpu_data.icache.n_aliases = 0; + boot_cpu_data.dcache.n_aliases = 0; + + pr_info("Enabling hardware synonym avoidance\n"); + } + #ifdef CONFIG_SMP /* * Broadcast I-cache block invalidations by default. |