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| author | Ingo Molnar <mingo@elte.hu> | 2008-07-30 19:36:55 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-07-30 19:36:55 +0200 |
| commit | bc588df79ebfb710abc27342fccf336a68ed1216 (patch) | |
| tree | e50e125eaa6da83fa715704e53c1bde013d1ef8e /arch/sparc/include/asm/visasm.h | |
| parent | bce7f793daec3e65ec5c5705d2457b81fe7b5725 (diff) | |
| parent | 15dd859cacf312f606f54502d1f66537a1e5c78c (diff) | |
Merge branch 'x86/core' into x86/xsave
Diffstat (limited to 'arch/sparc/include/asm/visasm.h')
| -rw-r--r-- | arch/sparc/include/asm/visasm.h | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/visasm.h b/arch/sparc/include/asm/visasm.h new file mode 100644 index 00000000000..de797b9bf55 --- /dev/null +++ b/arch/sparc/include/asm/visasm.h @@ -0,0 +1,62 @@ +#ifndef _SPARC64_VISASM_H +#define _SPARC64_VISASM_H + +/* visasm.h: FPU saving macros for VIS routines + * + * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz) + */ + +#include <asm/pstate.h> +#include <asm/ptrace.h> + +/* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc */ + +#define VISEntry \ + rd %fprs, %o5; \ + andcc %o5, (FPRS_FEF|FPRS_DU), %g0; \ + be,pt %icc, 297f; \ + sethi %hi(297f), %g7; \ + sethi %hi(VISenter), %g1; \ + jmpl %g1 + %lo(VISenter), %g0; \ + or %g7, %lo(297f), %g7; \ +297: wr %g0, FPRS_FEF, %fprs; \ + +#define VISExit \ + wr %g0, 0, %fprs; + +/* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc. + * Must preserve %o5 between VISEntryHalf and VISExitHalf */ + +#define VISEntryHalf \ + rd %fprs, %o5; \ + andcc %o5, FPRS_FEF, %g0; \ + be,pt %icc, 297f; \ + sethi %hi(298f), %g7; \ + sethi %hi(VISenterhalf), %g1; \ + jmpl %g1 + %lo(VISenterhalf), %g0; \ + or %g7, %lo(298f), %g7; \ + clr %o5; \ +297: wr %o5, FPRS_FEF, %fprs; \ +298: + +#define VISExitHalf \ + wr %o5, 0, %fprs; + +#ifndef __ASSEMBLY__ +static inline void save_and_clear_fpu(void) { + __asm__ __volatile__ ( +" rd %%fprs, %%o5\n" +" andcc %%o5, %0, %%g0\n" +" be,pt %%icc, 299f\n" +" sethi %%hi(298f), %%g7\n" +" sethi %%hi(VISenter), %%g1\n" +" jmpl %%g1 + %%lo(VISenter), %%g0\n" +" or %%g7, %%lo(298f), %%g7\n" +" 298: wr %%g0, 0, %%fprs\n" +" 299:\n" +" " : : "i" (FPRS_FEF|FPRS_DU) : + "o5", "g1", "g2", "g3", "g7", "cc"); +} +#endif + +#endif /* _SPARC64_ASI_H */ |