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| author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2013-10-08 08:43:00 -0700 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2013-10-08 08:43:00 -0700 |
| commit | e3c55d406bd8df1a878546002c93db90c42be10c (patch) | |
| tree | efb0ba2707c95fd7166cf1b76887c43c977e37dd /arch/tile/include/uapi/asm/cachectl.h | |
| parent | 4d6e482675f13e33599fc3d18fc723959be0a9b6 (diff) | |
| parent | d0e639c9e06d44e713170031fe05fb60ebe680af (diff) | |
Merge tag 'v3.12-rc4' into next
Merge with mainline to bring in changes to input subsystem that were
committed through other trees.
Diffstat (limited to 'arch/tile/include/uapi/asm/cachectl.h')
| -rw-r--r-- | arch/tile/include/uapi/asm/cachectl.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/tile/include/uapi/asm/cachectl.h b/arch/tile/include/uapi/asm/cachectl.h index af4c9f9154d..572ddcad209 100644 --- a/arch/tile/include/uapi/asm/cachectl.h +++ b/arch/tile/include/uapi/asm/cachectl.h @@ -29,8 +29,8 @@ * to honor the arguments at some point.) * * Flush and invalidation of memory can normally be performed with the - * __insn_flush(), __insn_inv(), and __insn_finv() instructions from - * userspace. The DCACHE option to the system call allows userspace + * __insn_flush() and __insn_finv() instructions from userspace. + * The DCACHE option to the system call allows userspace * to flush the entire L1+L2 data cache from the core. In this case, * the address and length arguments are not used. The DCACHE flush is * restricted to the current core, not all cores in the address space. |