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authorIngo Molnar <mingo@elte.hu>2008-09-05 18:56:57 +0200
committerIngo Molnar <mingo@elte.hu>2008-09-05 18:56:57 +0200
commit616ad8c44281c0c6711a72b560e01ec335ff27e0 (patch)
tree0a20453ffedb09db6fb41a0c2208ccc2c7751d3a /arch/x86/kernel/cpu/addon_cpuid_features.c
parent99809963c99e1ed868d9ebeb4a5e7ee1cbe0309f (diff)
parentb380b0d4f7dffcc235c0facefa537d4655619101 (diff)
Merge branch 'linus' into x86/defconfig
Diffstat (limited to 'arch/x86/kernel/cpu/addon_cpuid_features.c')
-rw-r--r--arch/x86/kernel/cpu/addon_cpuid_features.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 84a8220a607..a6ef672adbb 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -56,9 +56,22 @@ void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
switch (c->x86_vendor) {
case X86_VENDOR_INTEL:
- if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+ /*
+ * There is a known erratum on Pentium III and Core Solo
+ * and Core Duo CPUs.
+ * " Page with PAT set to WC while associated MTRR is UC
+ * may consolidate to UC "
+ * Because of this erratum, it is better to stick with
+ * setting WC in MTRR rather than using PAT on these CPUs.
+ *
+ * Enable PAT WC only on P4, Core 2 or later CPUs.
+ */
+ if (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 15))
return;
- break;
+
+ pat_disable("PAT WC disabled due to known CPU erratum.");
+ return;
+
case X86_VENDOR_AMD:
case X86_VENDOR_CENTAUR:
case X86_VENDOR_TRANSMETA: