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| author | David S. Miller <davem@davemloft.net> | 2009-01-08 11:05:59 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-01-08 11:05:59 -0800 |
| commit | 7f46b1343f723f98634a5dcee47856b2000079ed (patch) | |
| tree | ed22b6298c8dd2f687890a0d79abcd1d273b5f81 /arch/xtensa/include/asm/cache.h | |
| parent | b8c31da64165b8566fc6e1c9c826f76e7b98ff02 (diff) | |
| parent | 9e42d0cf5020aaf217433cad1a224745241d212a (diff) | |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/xtensa/include/asm/cache.h')
| -rw-r--r-- | arch/xtensa/include/asm/cache.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/xtensa/include/asm/cache.h b/arch/xtensa/include/asm/cache.h new file mode 100644 index 00000000000..f04c9891142 --- /dev/null +++ b/arch/xtensa/include/asm/cache.h @@ -0,0 +1,33 @@ +/* + * include/asm-xtensa/cache.h + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * (C) 2001 - 2005 Tensilica Inc. + */ + +#ifndef _XTENSA_CACHE_H +#define _XTENSA_CACHE_H + +#include <variant/core.h> + +#define L1_CACHE_SHIFT XCHAL_DCACHE_LINEWIDTH +#define L1_CACHE_BYTES XCHAL_DCACHE_LINESIZE +#define SMP_CACHE_BYTES L1_CACHE_BYTES + +#define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE/XCHAL_DCACHE_WAYS) +#define ICACHE_WAY_SIZE (XCHAL_ICACHE_SIZE/XCHAL_ICACHE_WAYS) +#define DCACHE_WAY_SHIFT (XCHAL_DCACHE_SETWIDTH + XCHAL_DCACHE_LINEWIDTH) +#define ICACHE_WAY_SHIFT (XCHAL_ICACHE_SETWIDTH + XCHAL_ICACHE_LINEWIDTH) + +/* Maximum cache size per way. */ +#if DCACHE_WAY_SIZE >= ICACHE_WAY_SIZE +# define CACHE_WAY_SIZE DCACHE_WAY_SIZE +#else +# define CACHE_WAY_SIZE ICACHE_WAY_SIZE +#endif + + +#endif /* _XTENSA_CACHE_H */ |