diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-19 13:05:22 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-19 13:05:22 -0800 |
| commit | 2f0bf92513be58d2d65c0a4cc05c5779a7cd81e1 (patch) | |
| tree | 969737816b237a6b920253e92cdac5dec99f04b5 /arch/xtensa/include/asm/regs.h | |
| parent | 1bd12c91de35756129b8ffe28a4fe45177b86381 (diff) | |
| parent | 055d4db1e1ef6f983c3565110fbe6737087e9103 (diff) | |
Merge tag 'xtensa-20121218' of git://github.com/czankel/xtensa-linux
Pull Xtensa patchset from Chris Zankel:
"This contains support of device trees, many fixes, and code clean-ups"
* tag 'xtensa-20121218' of git://github.com/czankel/xtensa-linux: (33 commits)
xtensa: don't try to build DTB when OF is disabled
xtensa: set the correct ethernet address for xtfpga
xtensa: clean up files to make them code-style compliant
xtensa: provide endianness macro for sparse
xtensa: fix RASID SR initialization
xtensa: initialize CPENABLE SR when core has one
xtensa: reset all timers on initialization
Use for_each_compatible_node() macro.
xtensa: add XTFPGA DTS
xtensa: add support for the XTFPGA boards
xtensa: add device trees support
xtensa: add IRQ domains support
xtensa: add U-Boot image support (uImage).
xtensa: clean up boot make rules
xtensa: fix mb and wmb definitions
xtensa: add s32c1i-based spinlock implementations
xtensa: add s32c1i-based bitops implementations
xtensa: add s32c1i-based atomic ops implementations
xtensa: add s32c1i sanity check
xtensa: add trap_set_handler function
...
Diffstat (limited to 'arch/xtensa/include/asm/regs.h')
| -rw-r--r-- | arch/xtensa/include/asm/regs.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/xtensa/include/asm/regs.h b/arch/xtensa/include/asm/regs.h index 8a8aa61ccc8..76096a4e5b8 100644 --- a/arch/xtensa/include/asm/regs.h +++ b/arch/xtensa/include/asm/regs.h @@ -52,6 +52,10 @@ #define EXCCAUSE_SPECULATION 7 #define EXCCAUSE_PRIVILEGED 8 #define EXCCAUSE_UNALIGNED 9 +#define EXCCAUSE_INSTR_DATA_ERROR 12 +#define EXCCAUSE_LOAD_STORE_DATA_ERROR 13 +#define EXCCAUSE_INSTR_ADDR_ERROR 14 +#define EXCCAUSE_LOAD_STORE_ADDR_ERROR 15 #define EXCCAUSE_ITLB_MISS 16 #define EXCCAUSE_ITLB_MULTIHIT 17 #define EXCCAUSE_ITLB_PRIVILEGE 18 @@ -105,4 +109,3 @@ #define DEBUGCAUSE_ICOUNT_BIT 0 /* ICOUNT would incr. to zero */ #endif /* _XTENSA_SPECREG_H */ - |