diff options
| author | Oskar Schirmer <os@emlix.com> | 2009-03-04 16:21:30 +0100 |
|---|---|---|
| committer | Chris Zankel <chris@zankel.net> | 2009-04-02 23:41:16 -0700 |
| commit | a81cbd2da48eacc860acf4f40ea05db790f4c7c3 (patch) | |
| tree | e6d8b940bfa97afebb713a01ad96e31b6ca0de48 /arch/xtensa | |
| parent | c947a585ab13f310c9223284dfd502790abd05f9 (diff) | |
xtensa: enforce slab alignment to maximum register width
XCHAL_DATA_WIDTH is the maximum register width, slab caches should be
aligned to this.
Theoretical fix as all variants have had an XCHAL_DATA_WIDTH of 4
(wordsize) for now. But the S6000 variant will raise this to 16.
Signed-off-by: Oskar Schirmer <os@emlix.com>
Signed-off-by: Johannes Weiner <jw@emlix.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa')
| -rw-r--r-- | arch/xtensa/include/asm/processor.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h index 07387d3b99f..fba8b7e44a2 100644 --- a/arch/xtensa/include/asm/processor.h +++ b/arch/xtensa/include/asm/processor.h @@ -25,6 +25,8 @@ # error Linux requires the Xtensa Windowed Registers Option. #endif +#define ARCH_SLAB_MINALIGN XCHAL_DATA_WIDTH + /* * User space process size: 1 GB. * Windowed call ABI requires caller and callee to be located within the same |