diff options
| author | Eric Witcher <ewitcher@mindspring.com> | 2013-10-18 02:42:34 -0400 |
|---|---|---|
| committer | Benoit Cousson <bcousson@baylibre.com> | 2013-10-22 16:53:01 +0200 |
| commit | 05bc85d1b52d8a9cc0faa7692747dcee05dd8bc9 (patch) | |
| tree | 34baa54fcebd2aa59fe28e7b7d0a8f94b9c4ec97 /arch | |
| parent | e7243b7673a20ac28cfdc78c8862587ea8173a39 (diff) | |
ARM: dts: omap5-uevm: fix mcspi node pin descriptions
Correct mcspi pin descriptions to match corresponding node name and
add chip select number to be consistent with OMAP5 TRM.
Signed-off-by: Eric Witcher <ewitcher@mindspring.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/omap5-uevm.dts | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index e06a04a6366..8d803056937 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -131,25 +131,25 @@ 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */ 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */ 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */ - 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */ + 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0 */ >; }; mcspi3_pins: pinmux_mcspi3_pins { pinctrl-single,pins = < - 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */ - 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ - 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */ - 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */ + 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi3_somi */ + 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi3_cs0 */ + 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi3_simo */ + 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi3_clk */ >; }; mcspi4_pins: pinmux_mcspi4_pins { pinctrl-single,pins = < - 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */ - 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */ - 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */ - 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ + 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi4_clk */ + 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi4_simo */ + 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi4_somi */ + 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi4_cs0 */ >; }; |