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authorVarun Sethi <Varun.Sethi@freescale.com>2011-03-24 11:50:26 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-03-30 10:44:09 +1100
commit05e02d7f88a08b500f0a100733109e4b09ffbeb2 (patch)
tree6e83789ed8bc4e77b8163ab2ff9cb0d364022eb7 /arch
parent67eb54944bb9de5f568ea2c28d4f20a5b7d2611d (diff)
powerpc/booke: Correct the SPRN_MAS5 definition.
339 is the SPR number for MAS5 documented by Power ISA 2.06, and implemented by e500mc. It is not yet used anywhere in the kernel, so nothing should be relying on the wrong number. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/include/asm/reg_booke.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 86ad8128963..3b1a9b70736 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -110,7 +110,7 @@
#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */
#define SPRN_MAS3 0x273 /* MMU Assist Register 3 */
#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */
-#define SPRN_MAS5 0x275 /* MMU Assist Register 5 */
+#define SPRN_MAS5 0x153 /* MMU Assist Register 5 */
#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */
#define SPRN_PID1 0x279 /* Process ID Register 1 */
#define SPRN_PID2 0x27A /* Process ID Register 2 */