summaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2010-05-20 09:41:17 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-05-20 09:41:17 -0700
commitc3ad33c9bcb6616999953af76f16318120fe3691 (patch)
treea6b239cecc675693cfb5145493bd1b750ea360fb /arch
parentfb091be08d1acf184e8801dfdcace6e0cb19b1fe (diff)
parentb5c80bc5d70a1ce5b071ed06dd95292b9de46f95 (diff)
Merge branch 'for-linus/i2c-2635' of git://git.fluff.org/bjdooks/linux
* 'for-linus/i2c-2635' of git://git.fluff.org/bjdooks/linux: (21 commits) i2c-highlander: remover superflous variable i2c-ibm-iic: drop NO_IRQ i2c-cpm: drop NO_IRQ i2c-mpc: drop NO_IRQ MAINTAINERS: add i2c tree for embedded platforms i2c-pxa: only define 'blue_murder'-function if DEBUG is #defined i2c-pxa: remove unused macro i2c-nomadik: fix operator precedence warning i2c-nomadik: release region when removed OMAP3: I2C: Clean up Errata 1p153 handling OMAP2/3: I2C: Errata ID i207: Clear wrong RDR interrupt omap: i2c: add a timeout to the busy waiting omap: i2c: make errata 1.153 workaround a separate function i2c-omap: add mpu wake up latency constraint in i2c omap: i2c: Add i2c support on omap4 platform i2c-bfin-twi: return completion in interrupt for smbus quick transfers i2c-bfin-twi: remove redundant retry i2c-bfin-twi: fix lost interrupts at high speeds i2c-bfin-twi: add debug output for error status i2c-bfin-twi: integrate timeout timer with completion interface ...
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/plat-omap/i2c.c39
1 files changed, 27 insertions, 12 deletions
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 624e26298fa..f044b592750 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -26,9 +26,12 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
+#include <linux/i2c-omap.h>
+
#include <mach/irqs.h>
#include <plat/mux.h>
#include <plat/i2c.h>
+#include <plat/omap-pm.h>
#define OMAP_I2C_SIZE 0x3f
#define OMAP1_I2C_BASE 0xfffb3800
@@ -70,14 +73,14 @@ static struct resource i2c_resources[][2] = {
}, \
}
-static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
+static struct omap_i2c_bus_platform_data i2c_pdata[ARRAY_SIZE(i2c_resources)];
static struct platform_device omap_i2c_devices[] = {
- I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
+ I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
+ I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_pdata[1]),
#endif
#if defined(CONFIG_ARCH_OMAP3)
- I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
+ I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_pdata[2]),
#endif
};
@@ -100,10 +103,12 @@ static int __init omap_i2c_nr_ports(void)
static int __init omap_i2c_add_bus(int bus_id)
{
struct platform_device *pdev;
+ struct omap_i2c_bus_platform_data *pd;
struct resource *res;
resource_size_t base, irq;
pdev = &omap_i2c_devices[bus_id - 1];
+ pd = pdev->dev.platform_data;
if (bus_id == 1) {
res = pdev->resource;
if (cpu_class_is_omap1()) {
@@ -123,6 +128,15 @@ static int __init omap_i2c_add_bus(int bus_id)
if (cpu_class_is_omap2())
omap2_i2c_mux_pins(bus_id);
+ /*
+ * When waiting for completion of a i2c transfer, we need to
+ * set a wake up latency constraint for the MPU. This is to
+ * ensure quick enough wakeup from idle, when transfer
+ * completes.
+ */
+ if (cpu_is_omap34xx())
+ pd->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat;
+
return platform_device_register(pdev);
}
@@ -146,8 +160,8 @@ static int __init omap_i2c_bus_setup(char *str)
get_options(str, 3, ints);
if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
return 0;
- i2c_rate[ints[1] - 1] = ints[2];
- i2c_rate[ints[1] - 1] |= OMAP_I2C_CMDLINE_SETUP;
+ i2c_pdata[ints[1] - 1].clkrate = ints[2];
+ i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
return 1;
}
@@ -161,9 +175,9 @@ static int __init omap_register_i2c_bus_cmdline(void)
{
int i, err = 0;
- for (i = 0; i < ARRAY_SIZE(i2c_rate); i++)
- if (i2c_rate[i] & OMAP_I2C_CMDLINE_SETUP) {
- i2c_rate[i] &= ~OMAP_I2C_CMDLINE_SETUP;
+ for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
+ if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
+ i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
err = omap_i2c_add_bus(i + 1);
if (err)
goto out;
@@ -197,9 +211,10 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
return err;
}
- if (!i2c_rate[bus_id - 1])
- i2c_rate[bus_id - 1] = clkrate;
- i2c_rate[bus_id - 1] &= ~OMAP_I2C_CMDLINE_SETUP;
+ if (!i2c_pdata[bus_id - 1].clkrate)
+ i2c_pdata[bus_id - 1].clkrate = clkrate;
+
+ i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
return omap_i2c_add_bus(bus_id);
}