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author | Thomas Gleixner <tglx@linutronix.de> | 2013-01-31 22:17:10 +0100 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2013-01-31 22:17:10 +0100 |
commit | a9037430c6c784165a940a90bcd29f886834c8e7 (patch) | |
tree | 4b186e0a761e93a6c6712053d444b566c0d25338 /drivers/acpi/processor_perflib.c | |
parent | 6125bc8b86d9da75ddac77e38f41afbf9f5de3e3 (diff) | |
parent | 12ad10004645d38356b14d1fbba379c523a61916 (diff) |
Merge branch 'timers/for-arm' into timers/core
Diffstat (limited to 'drivers/acpi/processor_perflib.c')
-rw-r--r-- | drivers/acpi/processor_perflib.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c index 836bfe06904..53e7ac9403a 100644 --- a/drivers/acpi/processor_perflib.c +++ b/drivers/acpi/processor_perflib.c @@ -340,6 +340,13 @@ static void amd_fixup_frequency(struct acpi_processor_px *px, int i) if ((boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model < 10) || boot_cpu_data.x86 == 0x11) { rdmsr(MSR_AMD_PSTATE_DEF_BASE + index, lo, hi); + /* + * MSR C001_0064+: + * Bit 63: PstateEn. Read-write. If set, the P-state is valid. + */ + if (!(hi & BIT(31))) + return; + fid = lo & 0x3f; did = (lo >> 6) & 7; if (boot_cpu_data.x86 == 0x10) |